NUS3045MN datasheet(2/12 Pages) ONSEMI

Part #	NUS3045MN

Description	Overvoltage Protection IC with Integrated MOSFET

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NUS2045MN, NUS3045MN

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2

Figure 1. Simplified Schematic

−

+

IN

VCC

GND

CNTRL

OUT

GATE

Schottky

Diode

LOAD

Microprocessor Port

NUSx045

C1

Undervoltage

Lock Out

Logic

FET

Driver

P−CH

Vref

AC/DC Adapter of

Accessory Charger

+

PIN FUNCTION DESCRIPTIONS

Pin #

Symbol

Pin Description

1

IN

This pin senses an external voltage point. If the voltage on this input rises above the overvoltage threshold

(VTH), the OUT pin will be driven to within 1.0 V of VCC, thus disconnecting the FET. The nominal threshold level

is 6.85 V and this threshold level can be increased with the addition of an external resistor between IN and VCC.

2, 10

GND

Circuit Ground

3

CNTRL

This logic signal is used to control the state of OUT and turn−on/off the P−channel MOSFET. A logic High

results in the OUT signal being driven to within 1.0 V of VCC which disconnects the FET. If this pin is not used,

the input should be connected to ground.

4, 9

DRAIN

Drain pin of the power MOSFET

5

SRC

Source pin of the power MOSFET

6

GATE

Gate pin of the power MOSFET

7

OUT

This signal drives the gate of a P−channel MOSFET. It is controlled by the voltage level on IN or the logic state

of the CNTRL input. When an overvoltage event is detected, the OUT pin is driven to within 1.0 V of VCC in less

than 1.0 _sec provided that gate and stray capacitance is less than 12 nF.

8

VCC

Positive Voltage supply. If VCC falls below 2.8 V (nom), the OUT pin will be driven to within 1.0 V of VCC, thus

disconnecting the P−channel FET.

OVERVOLTAGE PROTECTION CIRCUIT TRUTH TABLE

IN

CNTRL

OUT

<Vth

L

GND

<Vth

H

VCC

>Vth

L

VCC

>Vth

H

VCC

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