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BSP128 Datasheet(PDF) 3 Page - NXP Semiconductors |
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BSP128 Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 8 page April 1995 3 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor BSP128 CHARACTERISTICS Tj = 25 °C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V(BR)DSS drain-source breakdown voltage ID = 10 µA; VGS = 0 200 −− V IDSS drain-source leakage current VDS = 160 V; VGS = 0 −− 1 µA ±I GSS gate-source leakage current ±VGS = 20 V; VDS = 0 −− 100 nA VGS(th) gate-source threshold voltage ID = 1 mA; VGS = VDS 0.4 − 1.8 V RDS(on) drain-source on-resistance ID = 100 mA; VGS = 2.8 V − 58 Ω Y fs transfer admittance ID = 300 mA; VDS = 25 V 200 400 − mS Ciss input capacitance VDS = 25 V; VGS = 0; f = 1 MHz − 50 80 pF Coss output capacitance VDS = 25 V; VGS = 0; f = 1 MHz − 20 30 pF Crss feedback capacitance VDS = 25 V; VGS = 0; f = 1 MHz − 510 pF Switching times (see Figs 2 and 3) ton turn-on time ID = 250 mA; VDD = 50 V; VGS = 0 to 10 V − 510 ns toff turn-off time ID = 250 mA; VDD = 50 V; VGS = 0 to 10 V − 20 30 ns Fig.2 Switching times test circuit. VDD =50V. handbook, halfpage MBB691 50 Ω VDD = 50 V ID 10 V 0 V Fig.3 Input and output waveforms. handbook, halfpage MBB692 10 % 90 % 90 % 10 % ton toff OUTPUT INPUT |
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