ADV7344 datasheet(38/88 Pages) AD

Part #	ADV7344

Description	Multiformat Video Encoder Six 14-Bit Noise Shaped Video DACs

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ADV7344

Rev. 0 | Page 38 of 88

Table 26. Register 0x84 to Register 0x89

SR7 to

Bit Number

Reset

SR0

Register

Bit Description

7

6

5

4

3

2

1

0

Register Setting

Value

0

Disabled.

0x00

SD VSYNC-3H.

1

VSYNC = 2.5 lines (PAL),

VSYNC = 3 lines (NTSC).

0

Disabled.

0

1

Subcarrier phase reset mode enabled.

1

0

Timing reset mode enabled.

SD SFL/SCR/TR Mode Select.

1

SFL mode enabled.

0

720 pixels.

SD Active Video Length.

1

710 (NTSC), 702 (PAL).

0

Chroma enabled.

SD Chroma.

1

Chroma disabled.

0

Enabled.

SD Burst.

1

Disabled.

0

Disabled.

SD Color Bars.

1

Enabled.

0

DAC 2 = luma, DAC 3 = chroma.

0x84

SD Mode

Register 4

SD Luma/Chroma Swap.

1

DAC 2 = chroma, DAC 3 = luma.

0

5.17 μs.

0x02

0

1

5.31 μs.

1

0

5.59 μs (must be set for Macrovision

compliance).

NTSC Color Subcarrier Adjust (Delay

from the falling edge of output

HSYNC pulse to start of color burst).

1

Reserved.

0

Disabled.

SD EIA/CEA-861B Synchronization

Compliance.

1

Enabled.

Reserved.

0

Update field/line counter.

SD Horizontal/Vertical Counter

Mode.1

1

Field/line counter free running.

0

Normal.

0x86

SD Mode

Register 5

SD RGB Color Swap.

1

Color reversal enabled.

0

Disabled.

0x00

SD PrPb Scale.

1

Enabled.

0

Disabled.

SD Y Scale.

1

Enabled.

0

Disabled.

SD Hue Adjust.

1

Enabled.

0

Disabled.

SD Brightness.

1

Enabled.

0

Disabled.

SD Luma SSAF Gain.

1

Enabled.

0

Disabled.

SD Input Standard Auto Detect.

1

Enabled.

Reserved.

0

0 must be written to this bit.

0

SD YCrCb input.

0x87

SD Mode

Register 6

SD RGB Input Enable.

1

SD RGB input.

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