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6 page 
AD5627R/AD5647R/AD5667R, AD5627/AD5667 Preliminary Technical Data Rev. PrA. | Page 6 of 30 I2C TIMING SPECIFICATIONS VDD = 2.7 V to 5.5 V; all specifications TMIN to TMAX, fSCL = 3.4 MHz, unless otherwise noted.1 Table 5. Limit at TMIN, TMAX Parameter Conditions2 Min Max Unit Description fSCL3 Standard mode 100 KHz Serial clock frequency Fast mode 400 KHz High speed mode, CB = 100 pF 3.4 MHz High speed mode, CB = 400 pF 1.7 MHz t1 Standard mode 4 μs tHIGH, SCL high time Fast mode 0.6 μs High speed mode, CB = 100 pF 60 ns High speed mode, CB = 400 pF 120 ns t2 Standard mode 4.7 μs tLOW, SCL low time Fast mode 1.3 μs High speed mode, CB = 100 pF 160 ns High speed mode, CB = 400 pF 320 ns t3 Standard mode 250 ns tSU;DAT, data setup time Fast mode 100 ns High speed mode 10 ns t4 Standard mode 0 3.45 μs tHD;DAT, data hold time Fast mode 0 0.9 μs High speed mode, CB = 100 pF 0 70 ns High speed mode, CB = 400 pF 0 150 ns t5 Standard mode 4.7 μs tSU;STA, set-up time for a repeated start condition Fast mode 0.6 μs High speed mode 160 ns t6 Standard mode 4 μs tHD;STA, hold time (repeated) start condition Fast mode 0.6 μs High speed mode 160 ns t7 Standard mode 4.7 μs tBUF, bus free time between a stop and a start condition Fast mode 1.3 μs t8 Standard mode 4 μs tSU;STO, setup time for a stop condition Fast mode 0.6 μs High speed mode 160 ns t9 Standard mode 1000 ns tRDA, rise time of SDA signal Fast mode 300 ns High speed mode, CB = 100 pF 10 80 ns High speed mode, CB = 400 pF 20 160 ns t10 Standard mode 300 ns tFDA, fall time of SDA signal Fast mode 300 ns High speed mode, CB = 100 pF 10 80 ns High speed mode, CB = 400 pF 20 160 ns t11 Standard mode 1000 ns tRCL, rise time of SCL signal Fast mode 300 ns High speed mode, CB = 100 pF 10 40 ns High speed mode, CB = 400 pF 20 80 ns t11A Standard mode 1000 ns tRCL1, rise time of SCL signal after a repeated start condition and after an acknowledge bit Fast mode 300 ns High speed mode, CB = 100 pF 10 80 ns High speed mode, CB = 400 pF 20 160 ns |
