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DAC122S085 Datasheet (HTML) - National Semiconductor

Part No. DAC122S085
Description  12-Bit Micro Power DUAL Digital-to-Analog Converter with Rail-to-Rail Output
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Maker  NSC [National Semiconductor]
Homepage  http://www.national.com
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A.C. and Timing Characteristics
Values shown in this table are design targets and are subject to change before product release. The following specifica-
tions apply for V
A = +2.7V to +5.5V, VREFIN =VA,RL =2k
Ω to GND, C
L = 200 pF to GND, fSCLK = 30 MHz, input code range
48 to 4047. Boldface limits apply for T
MIN
≤ T
A
≤ T
MAX and all other limits are at TA = 25˚C, unless otherwise specified.
Symbol
Parameter
Conductions
Typical
Limits
Units
(Limits)
f
SCLK
SCLK Frequency
40
30
MHz (max)
t
s
Output Voltage Settling Time
400h to C00h code change
6
8.5
µs (max)
SR
Output Slew Rate
1
V/µs
Glitch Impulse
Code change from 800h to 7FFh
12
nV-sec
Digital Feedthrough
0.5
nV-sec
Digital Crosstalk
1
nV-sec
DAC-to-DAC Crosstalk
3
nV-sec
Multiplying Bandwidth
V
REFIN = 2.5V ± 0.1Vpp
160
kHz
Total Harmonic Distortion
V
REFIN = 2.5V ± 1Vpp
input frequency = 10kHz
70
dB
t
WU
Wake-Up Time
V
A = 3V
0.8
µsec
V
A = 5V
0.5
µsec
1/f
SCLK
SCLK Cycle Time
25
33
ns (min)
t
CH
SCLK High time
7
10
ns (min)
t
CL
SCLK Low Time
7
10
ns (min)
t
SS
SYNC Set-up Time prior to SCLK
Falling Edge
4
10
ns (min)
t
DS
Data Set-Up Time prior to SCLK
Falling Edge
1.5
3.5
ns (min)
t
DH
Data Hold Time after SCLK Falling
Edge
1.5
3.5
ns (min)
t
CFSR
SCLK fall prior to rise of SYNC
0
3
ns (min)
t
SYNC
SYNC High Time
6
10
ns (min)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions. Operation of the device beyond the maximum Operating Ratings is not recommended.
Note 2: All voltages are measured with respect to GND = 0V, unless otherwise specified
Note 3: When the input voltage at any pin exceeds 5.5V or is less than GND, the current at that pin should be limited to 10 mA. The 20 mA maximum package input
current rating limits the number of pins that can safely exceed the power supplies with an input current of 10 mA to two.
Note 4: The absolute maximum junction temperature (TJmax) for this device is 150˚C. The maximum allowable power dissipation is dictated by TJmax, the
junction-to-ambient thermal resistance (
θJA), and the ambient temperature (TA), and can be calculated using the formula PDMAX = (TJmax − TA)/ θJA. The values
for maximum power dissipation will be reached only when the device is operated in a severe fault condition (e.g., when input or output pins are driven beyond the
operating ratings, or the power supply polarity is reversed).
Note 5: Human body model is 100 pF capacitor discharged through a 1.5 k
Ω resistor. Machine model is 220 pF discharged through ZERO Ohms.
Note 6: See the section entitled "Surface Mount" found in any post 1986 National Semiconductor Linear Data Book for methods of soldering surface mount devices.
Note 7: The inputs are protected as shown below. Input voltage magnitudes up to 5.5V, regardless of VA, will not cause errors in the conversion result. For example,
if VA is 3V, the digital input pins can be driven with a 5V logic device.
20195204
Note 8: To guarantee accuracy, it is required that VA and VREFIN be well bypassed.
Note 9: Typical figures are at TJ = 25˚C, and represent most likely parametric norms. Test limits are guaranteed to National’s AOQL (Average Outgoing Quality
Level).
Note 10: This parameter is guaranteed by design and/or characterization and is not tested in production.
www.national.com
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