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Pin Descriptions and Equivalent Circuits (Continued) Pin Functions Pin No. Symbol Equivalent Circuit Description 18 19 V IN+ V IN− Analog signal inputs to the ADC. The differential full-scale input range is 600 mV P-P when the FSR pin is low, or 800 mV P-P when the FSR pin is high. 7V CMO Common Mode Voltage. The voltage output at this pin is required to be the common mode input voltage at V IN+ and V IN− when d.c. coupling is used. This pin should be grounded when a.c. coupling is used at the analog input. This pin is capable of sourcing or sinking 100µA. See Section 2.2. 31 V BG Bandgap output voltage capable of 100 µA source/sink. 126 CalRun Calibration Running indication. This pin is at a logic high when calibration is running. 32 R EXT External bias resistor connection. Nominal value is 3.3k-Ohms (±0.1%) to ground. See Section 1.1.1. 34 35 Tdiode_P Tdiode_N Temperature Diode Positive (Anode) and Negative (Cathode) for die temperature measurements. See Section 2.6.2. 45 REN Read Enable. A logic high on this input causes a byte of data to be read from the Capture Buffer with each RCLK cycle. This signal must not be asserted while the WEN is already asserted. This signal may be asserted asynchronously as it is internally synchronized with the internal sampling clock. 46 WEN Write Enable. A logic high on this input causes a byte of data to be written into the Capture Buffer with each sampling clock cycle.This signal may be asserted asynchronously as it is internally synchronized with the internal sampling clock. www.national.com 4 |
