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ADG1309 Datasheet(PDF) 8 Page - Analog Devices |
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ADG1309 Datasheet(HTML) 8 Page - Analog Devices |
8 / 16 page ADG1308/ADG1309 Rev. 0 | Page 8 of 16 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 EN VSS S1A S4A S3A S2A A0 GND VDD S1B S4B DA DB S3B S2B A1 ADG1309 TOP VIEW (Not to Scale) Figure 3. ADG1309 Pin Configuration (TSSOP and SOIC_N) Table 6. ADG1309 Pin Function Descriptions Pin Number SOIC/TSSOP Mnemonic Description 1 A0 Logic Control Input A0. 2 EN Active High Digital Input. When low, the device is disabled and all switches are off. When high, Ax logic inputs determine on switches. 3 VSS Most Negative Power Supply Potential. In single supply applications, this pin can be connected to ground. 4 S1A Source Terminal 1A. Can be an input or an output. 5 S2A Source Terminal 2A. Can be an input or an output. 6 S3A Source Terminal 3A. Can be an input or an output. 7 S4A Source Terminal 4A. Can be an input or an output. 8 DA Drain Terminal A. Can be an input or an output. 9 DB Drain Terminal B. Can be an input or an output. 10 S4B Source Terminal 4B. Can be an input or an output. 11 S3B Source Terminal 3B. Can be an input or an output. 12 S2B Source Terminal 2B. Can be an input or an output. 13 S1B Source Terminal 1B. Can be an input or an output. 14 VDD Most Positive Power Supply Potential. 15 GND Ground (0 V) Reference. 16 A1 Logic Control Input A1. ADG1309 TRUTH TABLE Table 7. Al A0 EN ON SWITCH PAIR X 0 NONE 1 1 X 0 0 1 1 0 1 1 2 1 0 1 3 1 1 1 4 1 X = Don’t care. |
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