ACMP609 datasheet(6/16 Pages) AD

Part #	ACMP609

Description	Rail-to-Rail, Fast, Low Power, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparators

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ADCMP608/ADCMP609

Preliminary Technical Data

Rev. PrA | Page 6 of 16

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

ADCMP608

TOP VIEW

(Not to Scale)

Q 1

VCC

6

VEE 2

SDN

5

VP 3

VN

4

ADCMP609

TOP VIEW

(Not to Scale)

VCC 1

Q

8

VP 2

Q

7

VN 3

VEE

6

SDN 4

LE/HYS

5

Figure 2. ADCMP608 Pin Configuration

Figure 3. ADCMP609 Pin Configuration

Table 4. ADCMP608 Pin Function Descriptions

Pin No.

Mnemonic

Description

1

Q

Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, VP, is greater than the

analog voltage at the inverting input, VN.

2

VEE

Negative Supply Voltage.

3

VP

Noninverting Analog Input.

4

Vn

Inverting Analog Input.

5

SDN

Shutdown. Drive this pin low to shutdown the device.

6

VCC

VCC Supply.

Table 5. ADCMP609 Pin Function Descriptions

Pin No.

Mnemonic

Description

1

VCCI/VCCO

Vcc Supply.

2

VP

Noninverting Analog Input.

3

Vn

Inverting Analog Input.

4

SDN

Shutdown. Drive this pin low to shutdown the device.

5

LE/HYS

Latch/Hysteresis Control. Bias with resistor or current source for hysteresis; drive TTL low to latch.

6

VEE

Negative Supply Voltage.

7

Q

Noninverting Output. Q is at logic low if the analog voltage at the noninverting input, VP, is greater than the

analog voltage at the inverting input, VN, provided the comparator is in compare mode.

8

Q

Inverting Output. Q is at logic high if the analog voltage at the noninverting input VP is greater than the analog

voltage at the inverting input, VN, provided the comparator is in compare mode.

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