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PTH08T241WAST Datasheet(PDF) 6 Page - Texas Instruments |
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PTH08T241WAST Datasheet(HTML) 6 Page - Texas Instruments |
6 / 38 page www.ti.com ELECTRICAL CHARACTERISTICS PTH08T240W, PTH08T241W SLTS264D – NOVEMBER 2005 – REVISED OCTOBER 2006 PTH08T241W (Ceramic Capacitors) T A = 25°C, VI = 5 V, VO = 3.3 V, CI = 200 µF ceramic, CO = 300 µF ceramic, and IO = IO max (unless otherwise stated) PARAMETER TEST CONDITIONS PTH08T241W UNIT MIN TYP MAX IO Output current Over VO range 25 °C, natural convection 0 10 A 11 × 0.69 ≤ V O≤ 1.2 4.5 VO(1) VI Input voltage range Over IO range V 1.2 < VO≤ 3.6 4.5 14 3.6 < VO≤ 5.5 VO + 2 14 VOADJ Output voltage adjust range Over IO range 0.69 5.5 V Set-point voltage tolerance ±0.5 ±1 (2) %Vo Temperature variation –40 °C < T A < 85°C ±0.3 %Vo VO Line regulaltion Over VI range ±3 mV Load regulation Over IO range ±2 mV Total output variation Includes set-point, line, load, –40 °C ≤ T A ≤ 85°C ±1.5 (2) %Vo RSET = 171 Ω, VI = 8 V, VO = 5.0 V 95% RSET = 1.21 kΩ, VO = 3.3 V 94% RSET = 2.38 kΩ, VO = 2.5 V 92% η Efficiency IO = 10 A RSET = 4.78 kΩ, VO = 1.8 V 90% RSET = 7.09 kΩ, VO = 1.5 V 88% RSET = 12.1 kΩ, VO = 1.2 V 87% RSET = 20.8 kΩ, VO = 1.0 V 85% VO Ripple (peak-to-peak) 20-MHz bandwidth 10 (3) mVPP ILIM Overcurrent threshold Reset, followed by auto-recovery 20 A ttr Recovery time 35 µs w/o TurboTrans CO= 200 µF, Type A ∆V tr 2.5 A/µs load step VO over/undershoot 165 mV Transient response 50 to 100% IOmax ttrTT w/ TurboTrans Recovery time 130 µs VO = 2.5 V CO= 1500 µF, Type A mV ∆V trTT VO over/undershoot 30 RTT = short IIL Track input current (pin 10) Pin to GND –130(4) µA dVtrack/dt Track slew rate capability CO ≤ CO (max) 1 V/ms VI increasing, RUVLO = OPEN 4.3 4.45 Adjustable Under-voltage lockout UVLOADJ Vi decreasing, RUVLO = OPEN 4.0 4.2 V (pin 11) Hysteresis, RUVLO≤ 52.3 kΩ 0.5 Input high voltage (VIH) Open(5) V Inhibit control (pin 11) Input low voltage (VIL) -0.2 0.8 Input low current (IIL ), Pin 11 to GND -235 µA Iin Input standby current Inhibit (pin 11) to GND, Track (pin 10) open 5 mA f s Switching frequency Over VI and IO ranges, SmartSync (pin 1) to GND 300 kHz Synchronization (SYNC) fSYNC 240 400 kHz frequency VSYNCH SYNC High-Level Input Voltage 2 5.5 V VSYNCL SYNC Low-Level Input Voltage 0.8 V tSYNC SYNC Minimum Pulse Width 200 nSec (1) The maximum input voltage is duty cycle limited to (VO× 11) or 14 volts, whichever is less. The maximum allowable input voltage is a function of switching frequency, and may increase or decrease when the SmartSync feature is utilized. Please review the SmartSync section of the Application Information for further guidance. (2) The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1% with 100 ppm/°C or better temperature stability. (3) For output voltages less than 1.7 V, the ripple may increase (up to 2 ×) when operating at input voltages greater than (V O× 11). See the SmartSync section of the Application Information for input voltage and frequency limitations. (4) A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control pin 10. The open-circuit voltage is less than 8 Vdc. (5) This control pin has an internal pull-up. Do not place an external pull-up on this pin. If it is left open-circuit, the module operates when input power is applied. A small, low-leakage (<100 nA) MOSFET is recommended for control. For additional information, see the related application note. 6 Submit Documentation Feedback |
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