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EM25LV010-25MS Datasheet(PDF) 5 Page - ELAN Microelectronics Corp |
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EM25LV010-25MS Datasheet(HTML) 5 Page - ELAN Microelectronics Corp |
5 / 30 page EM25LV010 1 Megabit (128K x 8) Serial Flash Memory SPECIFICATION Memory Organization The memory is organized as: 131,072 Bytes (8 bits per byte) 4 Blocks (256K bits or 32,768 bytes per block) 512 Pages (256 bytes per page) Each page can be individually programmed (bits are programmed from “1” to “0”). The device is Block or Chip Erasable (bits are erased from “0” to “1”), but not Page Erasable. Block Address Range 3 18000h 1FFFFh 2 10000h 17FFFh 1 08000h 0FFFFh 0 00000h 07FFFh Table 2: Memory Organization Control Logic I/O Buffer and Data Latches Address Register and Counter 256 Byte Data Buffer Status Register Y-Decoder Hold# W# S# C D Q 18000h 10000h 08000h 00000h 1FFFFh 000FFh Size of the read-only m em ory area 256 Bytes (Page Size) Block3 Block2 Block1 Block0 Figure 2: SPI Modes Supported This specification is subject to change without further notice. (11.08.2004 V1.0) Page 5 of 30 |
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