Over recommended operating supply and temperature ranges unless other specified.

Symbol

Parameter

Conditions

Min

Typ

(Note

5)

Max

Units

V

OD

Differential Output Voltage,

0% Pre-emphasis (Note 6)

R

Ω external resistor between OUT+ and OUT−

Figure 1

250

360

500

mV

∆V

OD

Change in V

Complementary States

−35

35

mV

V

OS

Offset Voltage (Note 7)

1.05

1.18

1.475

V

∆V

OS

Change in V

Complementary States

−35

35

mV

C

OUT

LVDS Output Capacitance

OUT+ or OUT− to V

SS

2.5

pF

I

OS

Output Short Circuit Current

OUT+ or OUT− Short to GND

−21

−40

mA

OUT+ or OUT− Short to VDD

6

40

mA

SUPPLY CURRENT (Static)

I

CC

Supply Current

All inputs and outputs enabled and active, terminated

with differential load of 100

Ω between OUT+ and OUT-.

PEM=L

175

215

mA

I

CCZ

Supply Current - Power

Down Mode

PWDN=L,PEM=L

20

200

µA

SWITCHING CHARACTERISTICS — LVDS OUTPUTS

t

LHT

Differential Low to High

Transition Time (Note 12)

Use an alternating 1 and 0 pattern at 200 Mbps, measure

between 20% and 80% of V

Figures 2, 4

170

250

ps

t

HLT

Differential High to Low

Transition Time (Note 12)

170

250

ps

t

PLHD

Differential Low to High

Propagation Delay

Use an alternating 1 and 0 pattern at 200 Mbps, measure

at 50% V

Figures 2, 3

1.0

2.0

ns

t

PHLD

Differential High to Low

Propagation Delay

1.0

2.0

ns

t

SKD1

Pulse Skew (Note 12)

|t

60

ps

t

SKCC

Output Channel to Channel

Skew (Note 12)

Difference in propagation delay (t

all output channels.

25

75

ps

t

SKP

Part to Part Skew (Note 12)

Common edge, parts at same temp and V

CC

550

ps

t

JIT

Jitter (0% Pre-emphasis)

(Note 8)

RJ - Alternating 1 and 0 at 750 MHz (Note 9)

0.5

1.5

ps

DJ - K28.5 Pattern, 1.5 Gbps (Note 10)

14

30

ps

TJ - PRBS 2

14

31

ps

t

ON

LVDS Output Enable Time

active.

Figures 5, 6

20

µs

t

OFF

LVDS Output Disable Time

TRI-STATE.

Figures 5, 6

12

ns

Note 8: Jitter is not production tested, but guaranteed through characterization on a sample basis.

Note 9: Random Jitter, or RJ, is measured RMS with a histogram including 1500 histogram window hits. Stimulus and fixture Jitter has been subtracted. The input

Note 11: Total Jitter, or TJ, is measured peak to peak with a histogram including 3500 window hits. Stimulus and fixture Jitter has been subtracted. The input voltage

Note 12: Not production tested. Guaranteed by a statistical analysis on a sample basis at the time of characterization.

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