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S75NS128ND0ZFWNJ2 Datasheet(PDF) 4 Page - SPANSION

Part # S75NS128ND0ZFWNJ2
Description  1.8 Volt-only, Stacked Multi-Chip Product (MCP) x16 MirrorBit Flash Memory and DRAM
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Manufacturer  SPANSION [SPANSION]
Direct Link  http://www.spansion.com
Logo SPANSION - SPANSION

S75NS128ND0ZFWNJ2 Datasheet(HTML) 4 Page - SPANSION

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S75NS128NDE based MCPs
S75NS128NDE_00_A2 September 23, 2005
Advan c e
Inf o rmation
S75NS128NDE Based MCPs
Notice On Data Sheet Designations . . . . . . . . . . . ii
Advance Information .............................................................. ii
Preliminary ..........................................................................................................ii
Combination .......................................................................................................ii
Full Production (No Designation on Document) ...................................ii
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 1
MCP Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . 6
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 7
Input/Output Descriptions . . . . . . . . . . . . . . . . . . . 8
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . .9
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . 10
S29NS-N MirrorBit
TM Flash Module
General Description . . . . . . . . . . . . . . . . . . . . . . . 12
Product Selector Guide . . . . . . . . . . . . . . . . . . . . 14
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Block Diagram of Simultaneous
Operation Circuit . . . . . . . . . . . . . . . . . . . . . . . . . 16
Input/Output Descriptions . . . . . . . . . . . . . . . . . . . 17
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 18
7DEOH 'HYLFH %XV2SHUDWLRQV  
VersatileIO™ (VIO) Control ............................................................................. 18
Requirements for Asynchronous Read Operation (Non-Burst) .......... 18
Requirements for Synchronous (Burst) Read Operation ....................... 19
Continuous Burst ............................................................................................ 19
7DEOH $GGUHVV/DWHQF\IRUDQG  :DLW6WDWHV  
7DEOH $GGUHVV/DWHQF\IRU:DLW 6WDWHV 
7DEOH $GGUHVV/DWHQF\IRU:DLW 6WDWHV 
7DEOH $GGUHVV/DWHQF\IRU:DLW 6WDWHV 
7DEOH $GGUHVV%RXQGDU\ &URVVLQJ/DWHQF\ IRU  DQG:DLW
6WDWHV 
7DEOH $GGUHVV%RXQGDU\ &URVVLQJ/DWHQF\ IRU :DLW 6WDWHV 
7DEOH $GGUHVV%RXQGDU\ &URVVLQJ/DWHQF\ IRU :DLW 6WDWHV 
7DEOH $GGUHVV%RXQGDU\ &URVVLQJ/DWHQF\ IRU :DLW 6WDWHV 
8-, 16-, and 32-Word Linear Burst with Wrap Around ...................... 21
7DEOH %XUVW$GGUHVV*URXSV  
8-, 16-, and 32-Word Linear Burst without Wrap Around ................ 21
Programmable Wait State ............................................................................... 22
Configuration Register ..................................................................................... 22
Handshaking Feature ......................................................................................... 22
Simultaneous Read/Write Operations with Zero Latency ................... 22
Writing Commands/Command Sequences ................................................ 22
Accelerated Program and Erase Operations ............................................. 22
Write Buffer Programming Operation .........................................................23
Autoselect Mode ................................................................................................ 24
Advanced Sector Protection and Unprotection ....................................... 24
Sector Protection ................................................................................................25
Persistent Sector Protection ...........................................................................25
Persistent Protection Bit (PPB) ................................................................. 26
Persistent Protection Bit Lock (PPB Lock Bit) in Persistent Sector
Protection Mode ............................................................................................ 26
Dynamic Protection Bit (DYB) .................................................................. 26
7DEOH 6HFWRU3URWHFWLRQ6FKHPHV  
Persistent Sector Protection Mode Lock Bit .............................................27
Password Sector Protection ........................................................................... 28
64-bit Password .................................................................................................. 28
Password Mode Lock Bit ................................................................................. 28
Persistent Protection Bit Lock (PPB Lock Bit) in Password Sector Pro-
tection Mode ........................................................................................................ 29
Hardware Data Protection Mode ................................................................. 29
Write Protect (WP#) ................................................................................... 29
WP# Boot Sector Protection ......................................................................... 29
Low VCC Write Inhibit .................................................................................... 30
Write Pulse “Glitch” Protection .................................................................... 30
Logical Inhibit ....................................................................................................... 30
Power-Up Write Inhibit ............................................................................... 30
Lock Register ....................................................................................................... 30
7DEOH  /RFN5HJLVWHU  
Automatic Sleep Mode ...................................................................................... 31
RESET#: Hardware Reset Input ...................................................................... 31
VCC Power-up and Power-down Sequencing ........................................ 31
Output Disable Mode ........................................................................................ 31
Secured Silicon Sector Flash Memory Region ............................................ 31
Factory Locked: Factor Secured Silicon Sector Programmed and Pro-
tected At the Factory ................................................................................... 32
7DEOH  6HFXUHG6LOLFRQ 6HFWRU$GGUHVVHV  
Customer Secured Silicon Sector ............................................................. 32
Common Flash Memory Interface (CFI) . . . . . . 33
7DEOH &),4XHU\,GHQWLILFDWLRQ 6WULQJ  
7DEOH  6\VWHP ,QWHUIDFH6WULQJ  
7DEOH  'HYLFH*HRPHWU\'HILQLWLRQ 
7DEOH  3ULPDU\ 9HQGRU6SHFLILF ([WHQGHG 4XHU\  
7DEOH  6HFWRU $GGUHVV7DEOH 6161  
7DEOH 6HFWRU $GGUHVV7DEOH 6161  
Command Definitions . . . . . . . . . . . . . . . . . . . . . .44
Reading Array Data ...........................................................................................44
Set Configuration Register Command Sequence .....................................44
Read Configuration Register Command Sequence ..................................44
Read Mode Setting ......................................................................................... 45
Programmable Wait State Configuration ............................................... 45
7DEOH  3URJUDPPDEOH:DLW6WDWH6HWWLQJV  
Programmable Wait State ........................................................................... 45
7DEOH  :DLW6WDWHVIRU+DQGVKDNLQJ  
Handshaking ..................................................................................................... 46
Burst Length Configuration ......................................................................... 46
7DEOH  %XUVW/HQJWK&RQILJXUDWLRQ  
Burst Wrap Around ...................................................................................... 46
RDY Configuration ........................................................................................ 46
RDY Polarity .................................................................................................... 46
Configuration Register . . . . . . . . . . . . . . . . . . . . . . 47
7DEOH  &RQILJXUDWLRQ5HJLVWHU  
Reset Command ................................................................................................. 47
7DEOH 'HYLFH,'  
Enter Secured Silicon Sector/Exit Secured Silicon Sector Command Se-
quence ....................................................................................................................49
Unlock Bypass Command Sequence ........................................................50
Program Command Sequence ........................................................................50
Program Command Sequence ....................................................................50
Program Command Sequence (Unlock Bypass Mode) .......................50
Accelerated Program ........................................................................................50
)LJXUH 3URJUDP 2SHUDWLRQ  
Write Buffer Programming Command Sequence ...................................... 51
7DEOH  :ULWH%XIIHU&RPPDQG 6HTXHQFH  
)LJXUH :ULWH%XIIHU 3URJUDPPLQJ 2SHUDWLRQ  
Chip Erase Command Sequence ................................................................... 53
Chip Erase Command Sequence ............................................................... 53
Sector Erase Command Sequence ................................................................ 54
Sector Erase Command Sequence ............................................................ 54
Accelerated Sector Erase ............................................................................ 55


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