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S75NS128ND0ZJWNK0 Datasheet(PDF) 6 Page - SPANSION |
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S75NS128ND0ZJWNK0 Datasheet(HTML) 6 Page - SPANSION |
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6 / 211 page  4 S75NS128NDE based MCPs S75NS128NDE_00_A2 September 23, 2005 Advan c e Inf o rmation )LJXUH 5HDGZLWK$XWR 3UHFKDUJH,QWHUUXSWHGE\ D :ULWH )LJXUH :ULWH ZLWK$XWR 3UHFKDUJH,QWHUUXSWHGE\ D 5HDG )LJXUH :ULWH ZLWK$XWR 3UHFKDUJH,QWHUUXSWHGE\ D :ULWH 7DEOH 7UXWK7DEOH²&.( 7DEOH 7UXWK7DEOH ²&XUUHQW 6WDWH %DQNQ &RPPDQGWR %DQNQ 7DEOH 7UXWK7DEOH ²&XUUHQW 6WDWH %DQNQ &RPPDQGWR %DQNP Absolute Maximum Ratings . . . . . . . . . . . . . . . . 125 7DEOH '& (OHFWULFDO&KDUDFWHULVWLFVDQG 2SHUDWLQJ&RQGLWLRQV 7DEOH $& (OHFWULFDO&KDUDFWHULVWLFVDQG 2SHUDWLQJ&RQGLWLRQV 7DEOH (OHFWULFDO&KDUDFWHULVWLFV DQG5HFRPPHQGHG$& 2SHUDWLQJ&RQGLWLRQV 7DEOH $& )XQFWLRQDO &KDUDFWHULVWLFV 7DEOH ,''6SHFLILFDWLRQVDQG&RQGLWLRQV 7DEOH ,'' ² 6HOI 5HIUHVK &XUUHQW 2SWLRQV 7DEOH &DSDFLWDQFH )LJXUH ,QLWLDOL]H DQG/RDG0RGH5HJLVWHU )LJXUH 3RZHU 'RZQ0RGH )LJXUH &ORFN6XVSHQG0RGH )LJXUH $XWR5HIUHVK0RGH )LJXUH 6HOI 5HIUHVK0RGH )LJXUH 5HDG:LWKRXW$XWR3UHFKDUJH )LJXUH 5HDG:LWK$XWR3UHFKDUJH )LJXUH 6LQJOH 5HDG :LWKRXW $XWR 3UHFKDUJH )LJXUH 6LQJOH 5HDG :LWK $XWR 3UHFKDUJH )LJXUH $OWHUQDWLQJ%DQN5HDG $FFHVVHV )LJXUH 5HDG)XOO3DJH%XUVW )LJXUH 5HDG'402SHUDWLRQ )LJXUH :ULWH :LWKRXW$XWR3UHFKDUJH )LJXUH :ULWH :LWK$XWR3UHFKDUJH )LJXUH 6LQJOH :ULWH :LWKRXW$XWR3UHFKDUJH )LJXUH 6LQJOH :ULWHZLWK$XWR3UHFKDUJH )LJXUH $OWHUQDWLQJ%DQN:ULWH$FFHVVHV )LJXUH :ULWH )XOO 3DJH%XUVW )LJXUH :ULWH '40 2SHUDWLRQ SDRAM Revision Summary . . . . . . . . . . . . . . . . . 146 S99KS256N MirrorBit™ Flash Family General Description . . . . . . . . . . . . . . . . . . . . . . 148 Product Selector Guide . . . . . . . . . . . . . . . . . . . 150 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 151 Input/Output Descriptions . . . . . . . . . . . . . . . . . 152 Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153 Device Bus Operations . . . . . . . . . . . . . . . . . . . . 153 7DEOH 'HYLFH%XV2SHUDWLRQV VersatileIO™ (VIO) Control ........................................................................... 154 Requirements for Asynchronous Read Operation (Non-Burst) ........................................................................ 154 Requirements for Synchronous (Burst) Read Operation ..................... 154 Continuous Burst .......................................................................................... 154 7DEOH $GGUHVV/DWHQF\ IRU DQG:DLW6WDWHV 7DEOH $GGUHVV/DWHQF\ IRU :DLW6WDWHV 7DEOH $GGUHVV/DWHQF\ IRU :DLW6WDWHV 7DEOH $GGUHVV/DWHQF\ IRU :DLW6WDWHV 7DEOH $GGUHVV%RXQGDU\&URVVLQJ/DWHQF\IRU DQG :DLW 6WDWHV 7DEOH $GGUHVV%RXQGDU\&URVVLQJ/DWHQF\IRU :DLW 6WDWHV 7DEOH $GGUHVV%RXQGDU\&URVVLQJ/DWHQF\IRU :DLW 6WDWHV 7DEOH $GGUHVV%RXQGDU\&URVVLQJ/DWHQF\IRU :DLW6WDWHV 8-, 16-, and 32-Word Linear Burst with Wrap Around ..................... 157 7DEOH %XUVW$GGUHVV*URXSV 8-, 16-, and 32-Word Linear Burst without Wrap Around .............. 157 Programmable Wait State .............................................................................. 157 Configuration Register .....................................................................................158 Handshaking Feature ........................................................................................158 Writing Commands/Command Sequences ...............................................158 Accelerated Program and Erase Operations ............................................158 Write Buffer Programming Operation .......................................................159 Autoselect Mode ...............................................................................................160 Sector Protection and Unprotection ..........................................................160 Sector Protection ..............................................................................................160 Dynamic Sector Protection .............................................................................161 Dynamic Protection Bit (DYB) ..................................................................161 Hardware Data Protection Mode .................................................................161 Write Protect (WP#) ..................................................................................162 WP# Boot Sector Protection ........................................................................162 Low VCC Write Inhibit ....................................................................................162 Write Pulse “Glitch” Protection ...................................................................162 Logical Inhibit ......................................................................................................162 Power-Up Write Inhibit ..............................................................................162 Lock Register ......................................................................................................162 7DEOH /RFN5HJLVWHU Automatic Sleep Mode ....................................................................................163 RESET#: Hardware Reset Input ....................................................................163 VCC Power-up and Power-down Sequencing ......................................163 Output Disable Mode ......................................................................................163 Secured Silicon Sector Flash Memory Region ..........................................164 Factory Locked: Factor Secured Silicon Sector Programmed and Protected At the Factory .........................................164 7DEOH 6HFXUHG6LOLFRQ6HFWRU$GGUHVVHV Customer Secured Silicon Sector ............................................................165 7DEOH 6HFWRU $GGUHVV7DEOH 6 .61 Command Definitions . . . . . . . . . . . . . . . . . . . . . 166 Reading Array Data ..........................................................................................166 Set Configuration Register Command Sequence ....................................166 Read Configuration Register Command Sequence .................................166 Read Mode Setting ........................................................................................167 Programmable Wait State Configuration ..............................................167 7DEOH 3URJUDPPDEOH:DLW6WDWH6HWWLQJV Programmable Wait State ..........................................................................167 7DEOH :DLW 6WDWHVIRU+DQGVKDNLQJ Handshaking ....................................................................................................167 Burst Length Configuration ........................................................................168 7DEOH %XUVW/HQJWK&RQILJXUDWLRQ Burst Wrap Around .....................................................................................168 RDY Configuration .......................................................................................168 RDY Polarity ...................................................................................................168 Configuration Register . . . . . . . . . . . . . . . . . . . . . 169 7DEOH &RQILJXUDWLRQ5HJLVWHU Reset Command ................................................................................................169 7DEOH 'HYLFH,' Enter Secured Silicon Sector/Exit Secured Silicon Sector Command Sequence .........................................................................................172 Unlock Bypass Command Sequence .......................................................172 Program Command Sequence .......................................................................172 Program Command Sequence ...................................................................172 Program Command Sequence (Unlock Bypass Mode) ......................172 Accelerated Program ....................................................................................... 173 )LJXUH 3URJUDP 2SHUDWLRQ |
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