TECHNICAL DATA

138

Quad 2-Input AND Gate

High-Voltage Silicon-Gate CMOS

The IW4081B AND gates provide the system designer with direct

emplementation of the AND function.

• Operating Voltage Range: 3.0 to 18 V

• Maximum input current of 1 µA at 18 V over full package-

temperature range; 100 nA at 18 V and 25

°C

• Noise margin (over full package temperature range):

1.0 V min @ 5.0 V supply

2.0 V min @ 10.0 V supply

2.5 V min @ 15.0 V supply

IW4081B

ORDERING INFORMATION

IW4081BN Plastic

IW4081BD SOIC

LOGIC DIAGRAM

PIN 7 = GND

PIN ASSIGNMENT

FUNCTION TABLE

Inputs

Output

AB

Y

LL

L

LH

L

HL

L

HH

H