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AM29LV6402MH100RPHI Datasheet(PDF) 9 Page - SPANSION |
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AM29LV6402MH100RPHI Datasheet(HTML) 9 Page - SPANSION |
9 / 57 page January 23, 2006 Am29LV6402M 7 PIN CONFIGURATION A–1 = Least significant address bit for the 16-bit data bus, and selects between the high and low word. A –1 is not used for the 32-bit mode (WORD# = VIH). A21–A0 = 22-bit address bus for 128 Mb device. DQ31–DQ0 = 32-bit data inputs/outputs/float WORD# = Selects 16-bit or 32-bit mode. When WORD# = VIH, data is output on DQ31–DQ0. When WORD# = VIL, data is output on DQ15–DQ0. CE# = Chip Enable Input. OE# = Output Enable Input. WE# = Write enable. VSS = Device ground RY/BY# = Ready/Busy output and open drain. When RY/BY# = VOH, the device is ready to ac- cept read operations and commands. When RY/BY# = V OL, the device is either executing an embedded algorithm or the device is executing a hardware reset oper- ation. WP#/ACC = Write Protect input/Acceleration input. VCC = Power Supply (2.7 V to 3.6 V) RESET# = Hardware reset input NC = Pin not connected internally LOGIC SYMBOLS x16 Mode x32 Mode Note:In x16 mode, DQ31 and DQ23 must be connected to each other on the board. 23 16 DQ15–DQ0 A21 to A-1 RY/BY# CE# OE# WE# WP#/ACC RESET# WP# WORD# V IO 22 32 DQ31–DQ0 A21–A0 RY/BY# CE# OE# WE# WP#/ACC RESET# WP# WORD# VIO |
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