HY62256AR2-I datasheet(11/14 Pages) ETC

Part #	HY62256AR2-I

Description	DRAM & SRAM MEMORY

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DATA RETENTION CHARACTERISTIC

TA= 0°C to 70°C (normal) /-40°C to 85°C (E.T.)

Symbol

Parameter

Test Condition

Min Typ Max Unit

VDR

Vcc for Data Re! ention

/CS >= Vcc-0.2V

Vss <= VIN <=

Vcc

2

-

V

ICCDR

Data

Retention

Current

HY62256A

Vcc = 3.0V

/CS >= Vcc

-0.2V

Vss <= VIN

<= Vcc

L

-

1

50

uA

LL

-

1

15(2) uA

HY62256A-1

L

-

1

50

uA

tCDR

Chip Disable to Data Retention

Time

See Data

Retention Timing

Diagram

0

-

ns

tR

Operating Recovery Time

tRC(3) -

-

ns

Notes

1. Typical values are under the condition of TA = 25°C

2. 3uA max. at TA= 0°C to 40°C

3. tRC is read cycle time.

Data Retention Timing Diagram

RELIABILITY SPEC.

TEST MODE

TEST SPEC.

ESD

HBM

MM

>= 2000V

>= 250V

LATCH-UP

<= -100mA

>= 100mA

3101 North First Street, San Jose, CA 95134

Phone: 408-232-8000 URL: http://www.hea.com/

SRAM Data Sheets | Memory Products | email: DRAMSRAMmemory@hea.com

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