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ADAU1702JSTZ-RL Datasheet(PDF) 3 Page - Analog Devices |
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ADAU1702JSTZ-RL Datasheet(HTML) 3 Page - Analog Devices |
3 / 52 page ADAU1702 Rev. 0 | Page 3 of 52 SPECIFICATIONS AVDD = 3.3 V, DVDD = 1.8 V, PVDD = 3.3 V, IOVDD = 3.3 V, ambient temperature 25° C, master clock input 12.288 MHz, unless otherwise noted . ANALOG PERFORMANCE Table 1. Parameter Min Typ Max Unit Test Conditions/Comments ADC INPUTS Number of Channels 2 Stereo input Resolution 24 Bits Full-Scale Input 100 (283) μArms (μAp-p) 2 Vrms input with 20 kΩ (18 kΩ external + 2 kΩ internal) series resistor Signal-to-Noise Ratio A-Weighted 100 dB Dynamic Range −60 dB with respect to full-scale analog input A-Weighted 95 100 dB Total Harmonic Distortion + Noise −83 dB −3 dB with respect to full-scale analog input Interchannel Gain Mismatch 25 250 mdB Crosstalk −82 dB Analog channel-to-channel crosstalk DC Bias 1.5 V Gain Error −11 +11 % DAC OUTPUTS Number of Channels 4 Two stereo output channels Resolution 24 Bits Full-Scale Analog Output 0.9 (2.5) Vrms (VP-P) Signal-to-Noise Ratio A-Weighted 104 dB Dynamic Range −60 dB with respect to full-scale analog output A-Weighted 99 104 dB Total Harmonic Distortion + Noise −90 dB −1 dB with respect to full-scale analog output Crosstalk −100 dB Analog channel-to-channel crosstalk Interchannel Gain Mismatch 25 250 mdB Gain Error −10 +10 % DC Bias 1.5 V VOLTAGE REFERENCE Absolute Voltage (CM, FILTA, FILTD) 1.5 V AUXILIARY ADC Full-Scale Analog Input 3.0 V INL 0.5 LSB DNL 1.0 LSB Offset 15 mV Input Impedance 30 kΩ |
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