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VRS51L570-25-P-G Datasheet(PDF) 7 Page - List of Unclassifed Manufacturers

Part # VRS51L570-25-P-G
Description  Versa 8051 MCUs with 32/64KB
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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VRS51L570-25-P-G Datasheet(HTML) 7 Page - List of Unclassifed Manufacturers

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VRS51x570/580
______________________________________________________________________________________________
www.ramtron.com
page 7 of 49
Program Memory Structure
Program Memory
The VRS51x580 includes 64KB of on-chip Flash that
can be used as general program memory. The Flash
memory size of the VRS51x570 is 32KB.
FIGURE 3: VRS51X580 / VRS51X570 INTERNAL PROGRAM MEMORY
VRS570
Flash Memory
(32K Bytes)
0000h
FFFFh
VRS580
Flash Memory
(64K Bytes)
0000h
7FFFh
Program Status Word Register
The PSW register is a bit addressable that contains
the status flags (CY, AC, OV, P), user flag (F0) and
register bank select bits (RS1, RS0) of the 8051
processor.
TABLE 7: PROGRAM STATUS WORD REGISTER (PSW) - SFR DOH
7
6
5
4
3
2
1
0
CY
AC
F0
RS1
RS0
OV
-
P
Bit
Mnemonic
Description
7
CY
Carry Bit
6
AC
Auxiliary Carry Bit from bit 3 to 4.
5
F0
User definer flag
4
RS1
R0-R7 Registers bank select bit 0
3
RS0
R0-R7 Registers bank select bit 1
2
OV
Overflow flag
1
-
-
0
P
Parity flag
RS1
RS0
Active Bank
Address
0
0
0
00h-07h
0
1
1
08h-0Fh
1
0
2
10h-17h
1
1
3
18-1Fh
Data Pointer
The VRS51x570 and VRS51x580 have one 16-bit data
pointer (DPTR). The DPTR is accessed via two SFR
addresses: DPL located at address 82h and DPH
located at address 83h.
Data Memory
The VRS51x580 and VRS51x570 have a total of 1KB of
on-chip RAM with a 256 byte subset of this block
mapped as the internal memory structure of a standard
8052.
The remaining 768 byte sub-block can be
accessed using external memory addressing via MOVX
instruction.
FIGURE 4: VRS51X570 /VRS51X580 RAM MEMORY
Upper 128 bytes
(Indirect addressing only)
Lower 128 bytes
(Can be accessed in indirect and
direct addressing mode)
SFR
(Direct addressing only)
Externally mapped
768 bytes RAM
(Can by accessed by
direct external addressing
mode, using the MOVX
instruction)
(XRAME=1)
02FF
0000
FF
80
7F
00
By default, after reset, the externally mapped block of
768 bytes of RAM is disabled and can be enabled by
setting the XRAME bit of the SYSCON register located
at address BFh in the SFR space.
Lower 128 bytes (00h to 7Fh, Bank 0 & Bank 1)
The lower 128 bytes of data memory (from 00h to 7Fh)
is summarized as follows:
• Address range 00h to 7Fh can be accessed in
direct and indirect addressing modes.
• Address range 00h to 1Fh includes R0-R7
registers area.
• Address range 20h to 2Fh is bit addressable.
• Address range 30h to 7Fh is not bit addressable
and can be used as general-purpose storage.


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