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IRS20954STRPBF Datasheet(PDF) 11 Page - International Rectifier |
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IRS20954STRPBF Datasheet(HTML) 11 Page - International Rectifier |
11 / 25 page IRS20954S www.irf.com 11 Self Reset Protection By simply putting a capacitor between the CSD and VSS, the OCP in the IRS20954 acts as a self. VB VDD IN CSD VSS COM OCSET LO VCC HO VS DT CSH NC NC VREF Ct Figure 8: Self-Reset Protection Configuration Designing Ct Timing capacitor Ct programs the protection resume interval timing tPR given as: CSD DD PR I V Ct t ⋅ ⋅ = 1 . 1 [sec] or DD CSD PR V I t Ct ⋅ ⋅ = 1 . 1 [F] For example, tPR is 1.2 s with a 10 µF capacitor for VDD=10.8 V. The start-up time tSU, from power-up to shutdown release, is given as: CSD DD SU I V Ct t ⋅ ⋅ = 7 . 0 [sec] or DD CSD SU V I t Ct ⋅ ⋅ = 7 . 0 [F] where ICSD is charge/discharge current in CSD pin, 100 µA. VDD is supply voltage respect to VSS. Protection-resume timing tPR should be long enough to avoid over heating and failure of the MOSFET from the repetitive sequences of shutdown and resume when the load is in continuous short circuit. In most of applications, the minimum recommended protection-resume timing tPR is 0.1 s. Shutdown Input By externally discharging Ct down to below Vth2, for example with a transistor shown in Fig. 9, the IRS20954 enters shutdown mode. The operation resumes when the voltage of CSD pin comes back and cross the upper threshold of CSD, Vth1, by its charging process. |
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