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HY62VF08401C-DSI Datasheet(PDF) 2 Page - Hynix Semiconductor |
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HY62VF08401C-DSI Datasheet(HTML) 2 Page - Hynix Semiconductor |
2 / 10 page HY62VF08401C Series Rev.02 / Jun.01 2 DESCRIPTION The HY62VF08401C is a high speed, super low power and 4Mbit full CMOS SRAM organized as 512K words by 8bits. The HY62VF08401C uses high performance full CMOS process technology and is designed for high speed and low power circuit technology. It is particularly well-suited for the high density low power system application. This device has a data retention mode that guarantees data to remain valid at a minimum power supply voltage of 1.2V. FEATURES • Fully static operation and Tri-state output • TTL compatible inputs and outputs • Battery backup -. 1.2V(min) data retention • Standard pin configuration -. 32 - sTSOP - 8X13.4(Standard) Standby Current(uA) Product No. Voltage (V) Speed (ns) Operation Current/Icc(mA) LL SL Temperature ( °C) HY62VF08401C-I 3.0~3.6 55/70 5 15 6 -40~85 Note 1. I : Industrial 2. Current value is max. PIN CONNECTION BLOCK DIAGRAM PIN DESCRIPTION Pin Name Pin Function Pin Name Pin Function /CS Chip Select I/O1 ~ I/O8 Data Input/Output /WE Write Enable Vcc Power (3.0V~3.6V) /OE Output Enable Vss Ground A0 ~ A18 Address Input MEMORY ARRAY 512K x 8 ROW DECODER A0 A18 /OE /WE /CS I/O1 I/O8 /OE A10 /CS I/O8 I/O7 I/O6 I/O5 I/O4 VSS I/O3 I/O2 I/O1 A0 A1 A2 A3 A11 A9 A8 A13 /WE A18 A15 VCC A17 A16 A14 A12 A7 A6 A5 A4 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 /OE A10 /CS I/O8 I/O7 I/O6 I/O5 I/O4 VSS I/O3 I/O2 I/O1 A0 A1 A2 A3 A11 A9 A8 A13 /WE A18 A15 VCC A17 A16 A14 A12 A7 A6 A5 A4 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32-sTSOP Forward |
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