 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
HY29F400ATR-55I Datasheet(PDF) 2 Page - Hynix Semiconductor |
|
||||||||||||||||||||||||||||||
HY29F400ATR-55I Datasheet(HTML) 2 Page - Hynix Semiconductor |
|
|
2 / 40 page  2 Rev. 1.0/Jan. 02 HY29F400A available. To eliminate bus contention, the HY29F400A has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls. The device is compatible with the JEDEC single power-supply Flash command set standard. Com- mands are written to the command register using standard microprocessor write timings, from where they are routed to an internal state-machine that controls the erase and programming circuits. De- vice programming is performed a byte or word at a time by executing the four-cycle Program com- mand. This initiates an internal algorithm that au- tomatically times the program pulse widths and verifies proper cell margin. The HY29F400A’s sector erase architecture allows any number of array sectors to be erased and re- programmed without affecting the data contents of other sectors. Device erasure is initiated by ex- ecuting the Erase command. This initiates an in- ternal algorithm that automatically preprograms the array (if it is not already programmed) before ex- ecuting the erase operation. During erase cycles, the device automatically times the erase pulse widths and verifies proper cell margin. To protect data in the device from accidental or unauthorized attempts to program or erase the device while it is in the system (e.g., by a virus), the device has a Sector Protect function which hardware write protects selected sectors. The sector protect and unprotect features can be en- abled in a PROM programmer. Temporary Sector Unprotect, which requires a high voltage, allows in-system erasure and code changes in previously protected sectors. Erase Suspend enables the user to put erase on hold for any period of time to read data from, or program data to, any sector that is not selected for erasure. True background erase can thus be achieved. The device is fully erased when shipped from the factory. Addresses and data needed for the programming and erase operations are internally latched during write cycles, and the host system can detect completion of a program or erase operation by observing the RY/BY# pin, or by reading the DQ[7] (Data# Polling) and DQ[6] (Toggle) status bits. Reading data from the device is similar to reading from SRAM or EPROM devices. Hardware data protection measures include a low V CC detector that automatically inhibits write operations during power transitions. The host can place the device into the standby mode. Power consumption is greatly reduced in this mode. BLOCK DIAGRAM STATE CONTROL WE# CE# OE# BYTE# COMMAND REGISTER DQ[15:0] A[17:0], A-1 V CC DETECTOR TIMER ERASE VOLTAGE GENERATOR AND SECTOR SWITCHES PROGRAM VOLTAGE GENERATOR X-DECODER Y-DECODER 4 Mb FLASH MEMORY ARRAY Y-GATING DATA LATCH I/O BUFFERS I/O CONTROL RESET# DQ[15:0] A[17:0], A-1 RY/BY# |
Similar Part No. - HY29F400ATR-55I |
|
Similar Description - HY29F400ATR-55I |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
