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HY62SF16806A-I Datasheet(PDF) 2 Page - Hynix Semiconductor |
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HY62SF16806A-I Datasheet(HTML) 2 Page - Hynix Semiconductor |
2 / 11 page HY62SF16806A Rev.03 /Jan. 2002 2 DESCRIPTION The HY62SF16806A is a high speed, super low power and 8Mbit full CMOS SRAM organized as 524,288 words by 16bits. The HY62SF16806A uses high performance full CMOS process technology and is designed for high speed and low power circuit technology. It is particularly well- suited for the high density low power system application. This device has a data retention mode that guarantees data to remain valid at a minimum power supply voltage of 1.2V. FEATURES • Fully static operation and Tri-state output • TTL compatible inputs and outputs • Battery backup(LL/SL-part) - 1.2V(min) data retention • Standard pin configuration - 48-uBGA Product Voltage Speed Operation Standby Current(uA) Temperature No. (V) (ns) Current/Icc(mA) LL SL ( °C) HY62SF16806A-C 1.7~2.3 70/85/100 3 25 8 0~70 HY62SF16806A-I 1.7~2.3 70/85/100 3 25 8 -40~85 Note 1. C : Commercial, I : Industrial 2. Current value is max. PIN CONNECTION ( Top View ) BLOCK DIAGRAM PIN DESCRIPTION Pin Name Pin Function Pin Name Pin Function /CS1, CS2 Chip Select I/O1~I/O16 Data Inputs / Outputs /WE Write Enable A0~A18 Address Inputs /OE Output Enable Vcc Power(1.7V~2.3V) /LB Lower Byte Control(I/O1~I/O8) Vss Ground /UB Upper Byte Control(I/O9~I/O16) NC No Connection 1 2 3 4 5 6 A B C D E F G H /LB IO9 IO10 /OE A0 A1 A2 CS2 /UB A3 A4 /CS1 IO1 IO11 A5 A6 IO2 IO3 Vss IO12 A17 A7 IO4 Vcc Vcc IO13 Vss A16 IO5 Vss IO15 IO14 A14 A15 IO6 IO7 IO16 NC A12 A13 /WE IO8 A18 A8 A9 A10 A11 NC MEMORY ARRAY 512K x 16 ROW DECODER I/O1 I/O8 I/O9 I/O16 A18 /CS1 /OE /LB /UB /WE CS2 |
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