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QL16x24B
4-30
High Drive Buffer
Clock Drivers
Propagation Delays (ns) [4]
Symbol
Parameter
Wired Together
Fanout
12
24
48
72
96
1
5.3
6.7
tIN
High Drive Input Delay
2
4.5
6.6
3
5.3
6.2
7.2
4
5.4
6.2
1
5.7
7.2
tINI
High Drive Input,
2
4.6
6.8
Inverting Delay
3
5.5
6.4
7.4
4
5.6
6.4
AC Performance
Propagation delays depend on routing, fanout, load capacitance, supply voltage, junction temperature,
and process variation. The AC Characteristics are a design guide to provide initial timing estimates at
nominal conditions. Worst case estimates are obtained when nominal propagation delays are multiplied
by the appropriate Delay Factor, K, as specified in the Delay Factor table (Operating Range). The
effects of voltage and temperature variation are illustrated in the graphs on page 4-47, K Factor versus
Voltage and Temperature. The pASIC Development Tools incorporate data sheet AC Characteristics
into the QDIF database for pre-place-and-route timing analysis. The SpDE Delay Modeler extracts
specific timing parameters for precise path analysis or simulation results following place and route.
ORDERING
INFORMATION
QL 16x24B - 1 PF144 C
QuickLogic
pASIC device
pASIC device part number
B = 0.65 micron CMOS
Operating Range
C = Commercial
I = Industrial
M = Military
M/883C = MIL STD 883
Package Code
PL84 = 84-pin PLCC
PF100 = 100-pin TQFP
PF144 = 144-pin TQFP
CG144 = 144-pin CPGA
CF160 = 160-pin CQFP
Speed Grade
X = quick
0 = fast
1 = faster
2 = fastest
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