7

White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com

EDI9LC644V

SDRAM AC CHARACTERISTICS

Symbol

125MHz

100MHz

83MHz

Parameter

Min

Max

Min

Max

Min

Max

Units

CL = 3

8

1000

10

1000

12

1000

ns

CL = 2

10

1000

12

1000

15

1000

67

8

ns

33

3

ns

33

3

ns

33

3

ns

22

2

ns

11

1

ns

22

2

ns

CLK to Output High-Z

77

8

ns

20

20

24

ns

20

20

24

ns

20

20

24

ns

50

10,000

50

10,000

60

10,000

ns

70

80

90

ns

70

80

90

ns

1

1

1

CLK

1

1

1

CLK

1

1

1

CLK

1.5

1.5

1.5

CLK

22

2

12

1

ea

NOTES:

1. Parameters depend on programmed CAS latency.

4. The minimum number of clock cycles required is detemined by dividing the minimum time required by the clock cycle time and then rounding up to the

next higher integer.

5. Minimum delay is required to complete write.

6. All devices allow every cycle column address changes.

7. In case of row precharge interrupt, auto precharge and read burst stop.