ALERT Response Address

The SMBus alert response interrupt pointer provides

quick fault identification for simple slave devices that

lack the complex logic needed to be a bus master.

Upon receiving an interrupt signal, the host master can

broadcast a receive byte transmission to the alert

response slave address (see the Slave Addresses sec-

tion). Then, any slave device that generated an inter-

rupt attempts to identify itself by putting its own

address on the bus.

The alert response can activate several different slave

If more than one slave attempts to respond, bus arbitra-

tion rules apply, and the device with the lower address

code wins. The losing device does not generate an

acknowledgment and continues to hold the ALERT line

low until cleared. (The conditions for clearing an alert

vary depending on the type of slave device.)

Successful completion of the alert response protocol

clears the output latch. If the condition that caused the

alert still exists, the MAX6689 reasserts the ALERT

interrupt at the end of the next conversion.

OVERT Overtemperature Alarms

The MAX6689 has four overtemperature registers that

store remote alarm threshold data for the OVERT output.

OVERT is asserted when a channel’s measured temper-

ature is greater than the value stored in the correspond-

ing threshold register. OVERT remains asserted until the

temperature drops below the programmed threshold

minus 4°C hysteresis. An overtemperature output can

be used to activate a cooling fan, send a warning, initi-

ate clock throttling, or trigger a system shutdown to pre-

vent component damage. See Table 3 for the POR state

of the overtemperature threshold registers.

Command Byte Functions

The 8-bit command byte register (Table 3) is the master

index that points to the various other registers within the

MAX6689. This register’s POR state is 0000 0000.

Configuration Byte Functions

There are three read-write configuration registers

(Tables 4, 5, and 6) that can be used to control the

MAX6689’s operation.

Configuration 1 Register

The configuration 1 register (Table 4) has several func-

tions. Bit 7 (MSB) is used to put the MAX6689 either in

software standby mode (STOP) or continuous conver-

sion mode. Bit 6 resets all registers to their power-on

reset conditions and then clears itself. Bit 5 disables

the SMBus timeout. Bit 4 enables more frequent con-

versions on channel 1, as described in the ADC

Conversion Sequence section. Bit 3 enables resistance

cancellation on channel 1. See the Series Resistance

Cancellation section for more details. The remaining

bits of the configuration 1 register are not used. The

POR state of this register is 0000 0000 (00h).

Configuration 2 Register

The configuration 2 register functions are described in

Table 5. Bits [6:0] are used to mask the ALERT interrupt

output. Bit 6 masks the local alert interrupt and bits 5

through bit 0 mask the remote alert interrupts. The

power-up state of this register is 0000 0000 (00h).

Configuration 3 Register

Table 6 describes the configuration 3 register. Bits 5, 4,

3, and 0 mask the OVERT interrupt output for channels

6, 5, 4, and 1. The remaining bits, 7, 6, 2, and 1, are

reserved. The power-up state of this register is 0000

0000 (00h).

Status Register Functions

Status registers 1, 2, and 3 (Tables 7, 8, and 9) indicate

which (if any) temperature thresholds have been

exceeded and if there is an open-circuit or short-circuit

fault detected with the external sense junctions. Status

register 1 indicates if the measured temperature has

exceeded the threshold limit set in the ALERT registers

for the local or remote-sensing diodes. Status register 2

indicates if the measured temperature has exceeded

the threshold limit set in the OVERT registers. Status

register 3 indicates if there is a diode fault (open or

short) in any of the remote-sensing channels.

Bits in the alert status register clear by a successful

read, but set again after the next conversion unless the

fault is corrected, either by a drop in the measured tem-

perature or an increase in the threshold temperature.

The ALERT interrupt output follows the status flag bit.

Once the ALERT output is asserted, it can be

deasserted by either reading status register 1 or by

successfully responding to an alert response address.

7-Channel Precision Temperature Monitor

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