UTRON
UT62L25616(I)
Rev. 1.1
256K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC.
P80054
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
4
CAPACITANCE (TA=25℃, f=1.0MHz)
PARAMETER
SYMBOL
MIN.
MAX
UNIT
Input Capacitance
CIN
-
6
pF
Input/Output Capacitance
CI/O
-
8
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
0V to 3.0V
Input Rise and Fall Times
5ns
Input and Output Timing Reference Levels
1.5V
Output Load
CL = 30pF, IOH/IOL = -1mA / 2.1mA
AC ELECTRICAL CHARACTERISTICS (VCC =2.7V~3.6V, TA = -40℃ to 85℃(I))
(1) READ CYCLE
PARAMETER
SYMBOL UT62L25616(I)-55 UT62L25616(I)-70 UT62L25616(I)-100 UNIT
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
Read Cycle Time
tRC
55
-
70
-
100
-
ns
Address Access Time
tAA
-
55
-
70
-
100
ns
Chip Enable Access Time
tACE
-
55
-
70
-
100
ns
Output Enable Access Time
tOE
-
30
-
35
-
50
ns
Chip Enable to Output in Low Z
tCLZ*
10
-
10
-
10
-
ns
Output Enable to Output in Low Z
tOLZ*
5
-
5
-
5
-
ns
Chip Disable to Output in High Z
tCHZ*
-
20
-
25
-
30
ns
Output Disable to Output in High Z
tOHZ*
-
20
-
25
-
30
ns
Output Hold from Address Change
tOH
5
-
5
-
5
-
ns
LB , UB Access Time
tBA
-
55
-
70
-
100
ns
LB , UB to High-Z Output
tHZB
-
25
-
30
-
40
ns
LB , UB to Low-Z Output
tLZB
0
-
0
-
0
-
ns
(2) WRITE CYCLE
PARAMETER
SYMBOL UT62L25616(I)-55 UT62L25616(I)-70 UT62L25616(I)-100 UNIT
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
Write Cycle Time
tWC
55
-
70
-
100
-
ns
Address Valid to End of Write
tAW
50
-
60
-
80
-
ns
Chip Enable to End of Write
tCW
50
-
60
-
80
-
ns
Address Set-up Time
tAS
0
-
0
-
0
-
ns
Write Pulse Width
tWP
45
-
55
-
70
-
ns
Write Recovery Time
tWR
0
-
0
-
0
-
ns
Data to Write Time Overlap
tDW
25
-
30
-
40
-
ns
Data Hold from End of Write Time
tDH
0
-
0
-
0
-
ns
Output Active from End of Write
tOW*
5
-
5
-
5
-
ns
Write to Output in High Z
tWHZ*
-
30
-
30
-
40
ns
LB , UB Valid to End of Write
tBW
45
-
60
-
80
-
ns
*These parameters are guaranteed by device characterization, but not production tested.
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