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TPS65022 Datasheet (HTML) - Texas Instruments

Part No. TPS65022
Description  POWER MANAGEMENT IC FOR LI-ION POWERED SYSTEMS
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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ELECTRICAL CHARACTERISTICS
SLVS667 – JULY 2006
RECOMMENDED OPERATING CONDITIONS (continued)
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
CI(DCDC2)
Input capacitor at VINDCDC2 (2)
10
µF
CO(DCDC2)
Output capacitor at VDCDC2 (2)
10
22
µF
IO(DCDC3)
Output current at L3
900
mA
Inductor at L3 (2)
2.2
3.3
µH
CI(DCDC3)
Input capacitor at VINDCDC3(2)
10
µF
CO(DCDC3)
Output capacitor at VDCDC3 (2)
10
22
µF
CI(VCC)
Input capacitor at VCC (2)
1
µF
Ci(VINLDO)
Input capacitor at VINLDO (2)
1
µF
CO(VLDO1-2)
Output capacitor at VLDO1, VLDO2 (2)
2.2
µF
IO(VLDO1-2)
Output current at VLDO1, VLDO2
200
mA
CO(VRTC)
Output capacitor at VRTC (3)
4.7
µF
TA
Operating ambient temperature
-40
85
°C
TJ
Operating junction temperature
-40
125
°C
Resistor from VINDCDC3, VINDCDC2, VINDCDC1 to VCC used for filtering(4)
1
10
(3)
See applications section for more information.
(4)
Up to 3 mA can flow into VCC when all 3 converters are running in PWM. This resistor causes the UVLO threshold to be shifted
accordingly.
VINDCDC1 = VINDCDC2 = VINDCDC3 = VCC = VINLDO = 3.6 V, VBACKUP = 3 V, T
A = –40°C to 85°C, typical values are
at T
A = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
CONTROL SIGNALS : SCLK, SDAT (input), DCDC1_EN, DCDC2_EN, DCDC3_EN, LDO_EN, DEFLDO1, DEFLDO2
Rpullup at SCLK and SDAT = 4.7 k
Ω,
VIH
High level input voltage
1.3
VCC
V
pulled to VRTC
Rpullup at SCLK and SDAT = 4.7 k
Ω,
VIL
Low level input voltage
0
0.4
V
pulled to VRTC
IH
Input bias current
0.01
0.1
µA
CONTROL SIGNALS : HOT_RESET
VIH
High level input voltage
1.3
VCC
V
VIL
Low level input voltage
0
0.4
V
IIB
Input bias current
0.01
0.1
µA
tglitch
Deglitch time at HOT_RESET
25
30
35
ms
CONTROL SIGNALS : LOWBAT, PWRFAIL, RESPWRON, INT, SDAT (output)
VOH
High level output voltage
6
V
VOL
Low level output voltage
IIL = 5 mA
0
0.3
V
Duration of low pulse at RESPWRON
External capacitor 1 nF
100
ms
Resetpwron threshold
VRTC falling
–3%
2.4
3%
V
Resetpwron threshold
VRTC rising
–3%
2.52
3%
V
3



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