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DP83251 Datasheet(PDF) 4 Page - National Semiconductor (TI) |
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DP83251 Datasheet(HTML) 4 Page - National Semiconductor (TI) |
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4 / 96 page  20 Architecture Description 21 OVERVIEW The PLAYER device is comprised of four blocks Receiver Transmitter Configuration Switch and Control Bus Interface as shown in Figure 2-1 Receiver During normal operation the Receiver Block accepts serial data as inputs at the rate of 125 Mbps from the Clock Re- covery Device (DP83231) During the Internal Loopback mode of operation the Receiver Block accepts data from the Transmitter Block as inputs The Receiver Block performs the following operations Converts the incoming data stream from NRZI to NRZ if necessary Decodes the data from 5B to 4B coding Converts the serial bit stream into 10-bit bytes Compensates for the differences between the upstream and local clocks Decodes Line States Detects link errors Finally the Receiver Block presents data symbol pairs (bytes) to the Configuration Switch Block Configuration Switch An FDDI station may be in one of three configurations Iso- late Wrap or Thru The Configuration Switch supports these configurations by switching the transmitted and received data paths between the PLAYER and BMAC devices The configuration switching is performed internally there- fore no external logic is required for this function Transmitter The Transmiter Block accepts 10-bit bytes from the Config- uration Switch The Transmitter Block performs the following operations Encodes the data from 4B to 5B coding Filters out code violations from the data stream Generates Idle Master Halt Quiet or other user defined symbol pairs upon request Converts the data stream from NRZ to NRZI format ready for transmission if necessary Provides smoothing function when necessary During normal operation the Transmitter Block presents se- rial data to the fiber optic transmitter While in the External Loopback mode the Transmitter Block presents serial data to the Clock Recovery Device Control Bus Interface The Control Bus Interface allows a user to Program the Configuration Switch Enabledisable functions within the Transmitter and Re- ceiver Blocks (ie NRZNRZI Encoder Smoother PHY Request Data Parity Line State Generation Symbol Pair Injection NRZNRZI Decoder Cascade Mode etc) The Control Bus Interface also performs the following func- tions Monitors Line States received Monitors link errors detected by the Receiver Block Monitors other error conditions 22 INTERFACES The PLAYER device connects to external components via 5 functional interfaces Serial Interface PHY Port Interface Control Bus Interface Clock Interface and the Miscellane- ous Interface Serial Interface The Serial Interface connects the PLAYER device to a fiber optic transmitter (FOTX) and the Clock Recovery Device (DP83231) TLF10386 – 2 FIGURE 2-1 PLAYER Device Block Diagram 4 |
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