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G

A0

Y0

1

3

7

A1

6

Y1

2

Y2

5

SN74LVC1G29

2-OF-3 DECODER/DEMULTIPLEXER

SCES569A – JUNE 2004 – REVISED SEPTEMBER 2006

ORDERING INFORMATION

ORDERABLE PART NUMBER

NanoStar™– WCSP (DSBGA)

SN74LVC1G29YEPR

0.23-mm Large Bump – YEP

Reel of 3000

_ _ _D9_

NanoFree™– WCSP (DSBGA)

SN74LVC1G29YZPR

0.23-mm Large Bump – YZP (Pb-free)

–40

°C to 85°C

Reel of 3000

SN74LVC1G29DCTR

SSOP – DCT

C29_ _ _

Reel of 250

SN74LVC1G29DCTT

Reel of 3000

SN74LVC1G29DCUR

VSSOP – DCU

C29_

Reel of 250

SN74LVC1G29DCUT

(1)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2)

DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.

DCU: The actual top-side marking has one additional character that designates the assembly/test site.

YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,

• = Pb-free).

FUNCTION TABLE

INPUTS

OUTPUTS

G

A1

A0

Y0

Y1

Y2

L

L

X

L

H

H

L

H

L

H

L

H

L

H

H

H

H

L

H

X

X

H

H

H

LOGIC DIAGRAM (POSITIVE LOGIC)

2

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