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JZ48F000BTY Datasheet(PDF) 7 Page - Intel Corporation |
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JZ48F000BTY Datasheet(HTML) 7 Page - Intel Corporation |
7 / 106 page Intel StrataFlash® Wireless Memory (L18) Datasheet Intel StrataFlash® Wireless Memory (L18) April 2005 Order Number: 251902, Revision: 009 7 09/02/04 -007 Added Table 7 “Bus Operations Summary” on page 45 Modified Table 32 “L18 SCSP Package Ordering Information” on page 105 and added the following order items: * RD48F2000L0YTQ0, RD48F2000L0YBQ0 * RD48F4000L0YTQ0, RD48F4000L0YBQ0 * PF48F3000L0YTQ0, PF48F3000L0YBQ0 * PF48F4000L0YTQ0, PF48F4000L0YBQ0 * NZ48F4000L0YTQ0, NZ48F4000L0YBQ0 * JZ48F4000LOYTQ0, JZ48F4000LOYBQ0 09/29/04 -008 Removed two mechanical drawings for 9x7.7x1.0 mm and 9x11x1.0 mm Added mechanical drawing Figure 4 “256-Mbit, 88-ball (80-active ball) SCSP Drawing and Dimen- sions (8x11x1.0 mm)” on page 15 In Table 32 “L18 SCSP Package Ordering Information” on page 105, corrected 256L18 package size from 8x10x1.2 mm to 8x11x1.2 mm 04/22/05 -009 Removed Bin 2 LC and Frequency Support Tables Added back VF BGA mechanical drawings Renamed 256-Mbit UT-SCSP to be 256-Mbit SCSP Updated Ordering Info Minor text edits Converted datasheet to new template In Table 4 “Bottom Parameter Memory Map” on page 24, corrected 256-Mbit Blk 131 address range from 100000 - 10FFFF to 800000 - 80FFFF In Section 5.1, “Absolute Maximum Ratings” on page 25, corrected Voltage on any signal (except VCC, VPP) from -0.5 V to +3.8 V to -0.5 V to +2.5 V In Section E.2, “Ordering Information for SCSP” on page 105, corrected package designators for leaded and lead-free packages from RD/PF to NZ/JZ |
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