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JZ48F0L0BTZ Datasheet(PDF) 4 Page - Intel Corporation |
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JZ48F0L0BTZ Datasheet(HTML) 4 Page - Intel Corporation |
4 / 106 page Intel StrataFlash® Wireless Memory (L18) April 2005 Intel StrataFlash® Wireless Memory (L18) Datasheet 4 Order Number: 251902, Revision: 009 9.1.4 Standby.................................................................................................................. 46 9.1.5 Reset ..................................................................................................................... 46 9.2 Device Commands ............................................................................................................. 47 9.3 Command Definitions ......................................................................................................... 48 10.0 Read Operations .................................................................................................................... 50 10.1 Asynchronous Page-Mode Read........................................................................................ 50 10.2 Synchronous Burst-Mode Read.......................................................................................... 50 10.2.1 Burst Suspend ....................................................................................................... 51 10.3 Read Configuration Register (RCR) ................................................................................... 51 10.3.1 Read Mode ............................................................................................................ 52 10.3.2 Latency Count........................................................................................................ 52 10.3.3 WAIT Polarity......................................................................................................... 54 10.3.3.1 WAIT Signal Function ............................................................................ 54 10.3.4 Data Hold............................................................................................................... 55 10.3.5 WAIT Delay............................................................................................................ 56 10.3.6 Burst Sequence ..................................................................................................... 56 10.3.7 Clock Edge ............................................................................................................ 57 10.3.8 Burst Wrap............................................................................................................. 57 10.3.9 Burst Length .......................................................................................................... 57 11.0 Programming Operations .................................................................................................. 58 11.1 Word Programming............................................................................................................. 58 11.1.1 Factory Word Programming................................................................................... 59 11.2 Buffered Programming........................................................................................................59 11.3 Buffered Enhanced Factory Programming ......................................................................... 60 11.3.1 Buffered EFP Requirements and Considerations.................................................. 60 11.3.2 Buffered EFP Setup Phase.................................................................................... 61 11.3.3 Buffered EFP Program/Verify Phase ..................................................................... 61 11.3.4 Buffered EFP Exit Phase ....................................................................................... 62 11.4 Program Suspend............................................................................................................... 62 11.5 Program Resume................................................................................................................ 63 11.6 Program Protection............................................................................................................. 63 12.0 Erase Operations................................................................................................................... 64 12.1 Block Erase......................................................................................................................... 64 12.2 Erase Suspend ................................................................................................................... 64 12.3 Erase Resume .................................................................................................................... 65 12.4 Erase Protection ................................................................................................................. 65 13.0 Security Modes....................................................................................................................... 66 13.1 Block Locking...................................................................................................................... 66 13.1.1 Lock Block ............................................................................................................. 66 13.1.2 Unlock Block .......................................................................................................... 66 13.1.3 Lock-Down Block ................................................................................................... 66 13.1.4 Block Lock Status .................................................................................................. 67 13.1.5 Block Locking During Suspend.............................................................................. 67 13.2 Protection Registers ........................................................................................................... 68 13.2.1 Reading the Protection Registers .......................................................................... 69 13.2.2 Programming the Protection Registers.................................................................. 70 13.2.3 Locking the Protection Registers ........................................................................... 70 |
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