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CS1204 Datasheet(PDF) 2 Page - Applied Micro Circuits Corporation |
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CS1204 Datasheet(HTML) 2 Page - Applied Micro Circuits Corporation |
2 / 4 page Product Brief ORINOCO STS-12/STM-4 DS3/E3/STS-1E SONET/SDH Mapper Part Number S1204CBI21, Revision 1.5, Dec. 2002 2 Empowering Intelligent Optical Networks Overview SONET/SDH Processing The ORINOCO implements SONET/SDH processing for STS-12/ STM-4 or STS-3/STM-1 data streams. It can support STS-1 sig- nals within an STS-12 or STS-3, or any combination of TUG-3/ AU-4 or AU-3 signals within an STM-1 or STM-4. The ORINOCO supports the mapping of DS3, E3 or STS-1 tributaries into SONET or SDH. For DS3/E3/STS-1E tributaries, the ORINOCO provides full framing and performance monitoring. In the SONET/SDH receive direction, the ORINOCO performs framing, descrambling, and TOH monitoring, including B1/B2 per- formance monitoring, serial channel access to the DCC, User Channel and Orderwire bytes, and monitoring of the J0, K1K2 (APS, AIS-L and RDI-L detection), S1 and M1 bytes. While pro- cessing the received pointers, the ORINOCO locates the start of the embedded SPEs and provides monitoring capabilities for the POH and pointer bytes. In the SONET/SDH transmit direction, the ORINOCO generates the appropriate SPE/VCs containing the input DS3/E3/STS-1E signals, including generation of path overhead (with generation of AIS-P and RDI-P). A SONET/SDH STS-12/STM-4 or STS-3/STM- 1 frame is then created, with its corresponding TOH. The user has the ability to control the contents of all defined TOH bytes, includ- ing register map control of the K1K2, J0, M1 and S1 bytes, as well as serial channel access to the DCC, User Channel and Order- wire bytes. The B1 and B2 bytes are automatically generated, as well as AIS-L and RDI-L indications. The ORINOCO is SONET and SDH standards compliant with Bellcore GR-253 and GR-499 and ITU G.707 and G.783. DS3/E3 Processing The ORINOCO provides DS3/E3 mapper and de-mapper func- tions. The DS3/E3 mapper accepts data from an external DS3/E3 input, looped-back DS3/E3 tributaries, or internal DS3/E3 frame generators. The ORINOCO provides full DS3/E3 framing and per- formance monitoring in both transmit and receive directions. The ORINOCO supports both M23 and C-bit parity DS3 frame for- mats. It provides the following DS3 mapping options: DS3/STS-1, DS3/AU-3 and DS3/TUG-3/AU-4. The ORINOCO supports both the G.751 and G.832 E3 frame for- mats. It provides the following E3 mapping options: E3/AU-3 and E3/TUG-3/AU-4. DS3 monitoring functionality includes support for AIS, idle, RAI, AIC, FEAC, path parity, FEBE detection/insertion, detection of DS3 frame errors (OOF and SEF), and DS3 performance monitor- ing per ANSI T1.231. E3 monitoring functionality includes detection of REI, RDI, LOF, AIS, and BIP-4/BIP-8 parity errors, as well as errored block and errored second indications. STS-1 Processing The ORINOCO provides STS-1 mapper and de-mapper func- tions. The STS-1 mapper accepts data from external STS-1E inputs and/or from looped-back STS-1 tributaries. The ORINOCO provides full STS-1 framing, descrambling, performance monitor- ing and pointer processing in the transmit direction. In the receive direction, the ORINOCO provides full STS-1 frame generation and scrambling. Line Interface On the line side, the ORINOCO supports an 8-bit parallel interface which operates at 77.76 MHz for STS-12/STM-4 applications. In this mode, the device is connected to the S3037 parallel-to-serial converter (see application figure below). Optionally, the ORINOCO supports a serial line interface which operates at 622.08 MHz for STS-12/STM-4 applications, or at 155.52 MHz or STS-3/STM-1. In these applications, the device is connected to the S3024 clock recovery device. APS Interface The ORINOCO provides APS input and output interfaces to con- vey signals between two S1204 devices configured for APS oper- ation. This configuration supports both 1+1 and 1:1 configurations. The APS interface consists of serial clock and data, operating a 622 MHz for STS-12/STM-4 operation, or 155 MHz for STS-3/STM-1 operation. System Interface The ORINOCO supports up to 12 DS3/E3/STS1 tributaries. In the SONET/SDH Receive direction, the ORINOCO generates a serial (NRZ) data signal, accompanied by a smoothed DS3/E3 clock and a start of frame indication for each DS3/E3 tributary. For STS- 1E tributaries, the ORINOCO provides RX serial (NRZ) data and clock and frame start signals at 51.84 MHz. In the SONET/SDH Transmit direction, the ORINOCO provides two modes of operation. In clear-channel mode, the ORINOCO accepts a full DS3/E3 signal, payload and overhead bits, and per- forms framing on the incoming signal. The frame start inputs are ignored in this mode of operation. In DS3 payload only mode, the ORINOCO accepts the DS3 payload only on the data inputs. The frame start signal indicates the start of the payload (the first data bit following the X1 overhead bit). The ORINOCO maps the DS3 payload data into a full DS3 frame, prior to mapping into a SONET/SDH SPE. DS3/E3 Desynchronizer The ORINOCO provides for dense DS3/E3 integration by per- forming all functions related to DS3/E3 desynchronization. The clock smoother consists of a single, off-chip clock reference together with 12 independent on-chip digitally controlled modula- tors, digital filters and frequency detectors. This desynchronizer circuitry provides jitter and wander compliance to the ANSI T1- 105.03-1994 and ANSI T1-105.03b-1997 specifications. Packaging and Power The ORINOCO is packaged in a ceramic ball grid array totaling 474 pins (CBGA474). Two power sources, +3.3V and +2.5V, sup- plies the I/O and core voltages respectively. |
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