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MC68HC908QY4A Datasheet(PDF) 3 Page - Freescale Semiconductor, Inc |
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MC68HC908QY4A Datasheet(HTML) 3 Page - Freescale Semiconductor, Inc |
3 / 36 page Variables Used in the Routines On-Chip FLASH Programming Routines, Rev. 4 Freescale Semiconductor 3 ERARNGE This routine is used to erase either a page (64 bytes) or the whole array of FLASH. It can be used when the internal operating frequency (fop) is between 1.0 MHz and 8.4 MHz. DELNUS This routine can generate a specified delay based on the values of register X and accumulator (A) as parameters. DELNUS is used in ERARNGE routine. Variables Used in the Routines The RDVRNGE, PRGRNGE, and ERARNGE routines require certain registers and/or RAM locations to be initialized before calling the routines in the user software. Table 1 shows variables used in the routines and their locations. RAM In general, RAM in Table 1 indicates the RAM start address. See Table 2 for RAM start locations for specific MCUs. For example, the RAM start address for the MC68HC908LB8 (and each MCU currently in the table) is $80. CTRLBYT The control byte (CTRLBYT) is located at RAM address RAM+$8 and is used for the ERARNGE routine. In the case of the MC68HC908LB8, the CTRLBYT is located at $88. Bit 6 in this location is used to specify either MASS (1) or PAGE (0) erase. The other bits must be 0. If one or more of these bits (except bit 6) is initialized with 1, the erase operation is not executed. Table 1. Variables and Their Locations Location Variable Name Size (Bytes) Description RAM – RAM+7 Reserved 8 Reserved for future use RAM+$8 CTRLBYT 1 Control byte setting erase size RAM+$9 CPUSPD 1 CPU speed — the nearest integer of fop (in MHz) × 4; for example, if fop = 2.4576 MHz, CPUSPD = 10 RAM+$A, RAM+$B LADDR 2 Last address of a 16-bit range RAM+$C DATA Varies First location of DATA array; DATA array size must match a programming or verifying range Registers H:X — 2 Beginning address of a 16-bit range |
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