Electronic Components Datasheet Search |
|
DP83849I Datasheet(PDF) 67 Page - National Semiconductor (TI) |
|
|
DP83849I Datasheet(HTML) 67 Page - National Semiconductor (TI) |
67 / 106 page 67 www.national.com 7.2 Extended Registers - Page 0 7.2.1 False Carrier Sense Counter Register (FCSCR) This counter provides information required to implement the “False Carriers” attribute within the MAU managed object class of Clause 30 of the IEEE 802.3u specification. 7.2.2 Receiver Error Counter Register (RECR) This counter provides information required to implement the “Symbol Error During Carrier” attribute within the PHY man- aged object class of Clause 30 of the IEEE 802.3u specification. 7.2.3 100 Mb/s PCS Configuration and Status Register (PCSR) This register contains control and status information for the 100BASE Physical Coding Sublayer. Table 33. False Carrier Sense Counter Register (FCSCR), address 14h Bit Bit Name Default Description 15:8 RESERVED 0, RO RESERVED: Writes ignored, Read as 0 7:0 FCSCNT[7:0] 0, RO/COR False Carrier Event Counter: This 8-bit counter increments on every false carrier event. This counter sticks when it reaches its max count (FFh). Table 34. Receiver Error Counter Register (RECR), address 15h Bit Bit Name Default Description 15:8 RESERVED 0, RO RESERVED: Writes ignored, Read as 0 7:0 RXERCNT[7:0] 0, RO/COR RX_ER Counter: When a valid carrier is present and there is at least one occurrence of an invalid data symbol, this 8-bit counter increments for each re- ceive error detected. This event can increment only once per valid carrier event. If a collision is present, the attribute will not incre- ment. The counter sticks when it reaches its max count. Table 35. 100 Mb/s PCS Configuration and Status Register (PCSR), address 16h Bit Bit Name Default Description 15:12 RESERVED <00>, RO RESERVED: Writes ignored, Read as 0. 11 FREE_CLK 0, RW Receive Clock: 1 = RX_CLK is free-running 0 = RX_CLK phase adjusted based on alignment 10 TQ_EN 0, RW 100Mbs True Quiet Mode Enable: 1 = Transmit True Quiet Mode. 0 = Normal Transmit Mode. 9 SD FORCE PMA 0,RW Signal Detect Force PMA: 1 = Forces Signal Detection in PMA. 0 = Normal SD operation. |
Similar Part No. - DP83849I |
|
Similar Description - DP83849I |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |