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LT1725CS Datasheet(PDF) 9 Page - Linear Technology |
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LT1725CS Datasheet(HTML) 9 Page - Linear Technology |
9 / 28 page 9 LT1725 1725f The LT1725 is a current mode switcher controller IC designed specifically for the isolated flyback topology. The Block Diagram shows an overall view of the system. Many of the blocks are similar to those found in traditional designs, including: Internal Bias Regulator, Oscillator, Logic, Current Amplifier and Comparator, Driver and Out- put Switch. The novel sections include a special Flyback Error Amplifier and a Load Compensation mechanism. Also, due to the special dynamic requirements of flyback control, the Logic system contains additional functionality not found in conventional designs. The LT1725 operates much the same as traditional current mode switchers, the major difference being a different type of error amplifier that derives its feedback informa- tion from the flyback pulse. Due to space constraints, this discussion will not reiterate the basics of current mode switcher/controllers and isolated flyback converters. A good source of information on these topics is Application Note AN19. ERROR AMPLIFIER—PSEUDO DC THEORY Please refer to the simplified diagram of the Flyback Error Amplifier. Operation is as follows: when MOSFET output switch M1 turns off, its drain voltage rises above the VIN rail. The amplitude of this flyback pulse as seen on the third winding is given as: V V V I ESR N FLBK OUT F SEC ST = ++ () • VF = D1 forward voltage ISEC = transformer secondary current ESR = total impedance of secondary circuit NST = transformer effective secondary-to-third winding turns ratio The flyback voltage is then scaled by external resistor divider R1/R2 and presented at the FB pin. This is then compared to the internal bandgap reference by the differ- ential transistor pair Q1/Q2. The collector current from Q1 is mirrored around and subtracted from fixed current source IFXD at the VC pin. An external capacitor integrates this net current to provide the control voltage to set the current mode trip point. OPERATIO The relatively high gain in the overall loop will then cause the voltage at the FB pin to be nearly equal to the bandgap reference VBG. The relationship between VFLBK and VBG may then be expressed as: V RR R V FLBK BG = + () 12 2 Combination with the previous VFLBK expression yields an expression for VOUT in terms of the internal reference, programming resistors, transformer turns ratio and diode forward voltage drop: VV RR RN V I ESR OUT BG ST FSEC = + () 12 2 1 –– • Additionally, it includes the effect of nonzero secondary output impedance, which is discussed below in further detail, see Load Compensation Theory. The practical as- pects of applying this equation for VOUT are found in the Applications Information section. So far, this has been a pseudo-DC treatment of flyback error amplifier operation. But the flyback signal is a pulse, not a DC level. Provision must be made to enable the flyback amplifier only when the flyback pulse is present. This is accomplished by the dotted line connections to the block labeled “ENAB”. Timing signals are then required to enable and disable the flyback amplifier. ERROR AMPLIFIER—DYNAMIC THEORY There are several timing signals which are required for proper LT1725 operation. Please refer to the Timing Diagram. Minimum Output Switch On Time The LT1725 effects output voltage regulation via flyback pulse action. If the output switch is not turned on at all, there will be no flyback pulse and output voltage informa- tion is no longer available. This would cause irregular loop response and start-up/latchup problems. The solution cho- sen is to require the output switch to be on for an absolute minimum time per each oscillator cycle. This in turn estab- lishes a minimum load requirement to maintain regula- tion. See Applications Information for further details. |
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