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U6239B Datasheet(PDF) 10 Page - TEMIC Semiconductors |
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U6239B Datasheet(HTML) 10 Page - TEMIC Semiconductors |
10 / 15 page U6239B TELEFUNKEN Semiconductors Rev. A3, 28-May-97 10 (15) 3-Wire Bus Description (continued) Reference divider selection RD1, RD2, RDS: RDS Voltage at Pin 3 RD2 RD1 Reference Divider Ratio Frequency Step Size* Maximum Operating Frequency* 0 to 10% VS or open 0 to 10% VS or open 0 to 10% VS or open 0 to 10% VS or open 0 0 1 1 0 1 0 1 280 50 500 100 228.57 kHz 1280 kHz 128 kHz 640 kHz 2.9 GHz 2.9 GHz 2.097 GHz 2.9 GHz 90 to 100% VS 90 to 100% VS 90 to 100% VS 90 to 100% VS 0 0 1 1 0 1 0 1 140 25 250 50 457.14 kHz 2560kHz 256 kHz 1280 kHz 2.9 GHz 2.9 GHz 2.9 GHz 2.9 GHz * when a 4-MHz crystal is used 3-Wire Bus Pulse Diagram P6 P4 SDA MSB 14-bit scaling factor SF SCL ENABLE P7 P5 LSB RD1 RD2 4 Port bits/ 2 Ref.Div. bits n13 n0 9611813 Figure 3. n0 to n13 Scaling factor (SF) SF = 8192 n13 + 4096 n12 + ... +2 n1 + n0 SF - Range: 256..16383 P4 to P7 Port outputs P4 - P7 = 1: port active RD1, RD2 Reference divider selection see table above 3-Wire Bus Timing TH TS TL TT LSB Clock Enable Data TSL TC 9611880 Figure 4. Parameters Symbol Min. Max. Unit Setup time TS 2 ms Enable hold time TSL 2 ms Clock width TC 2 ms Enable setup time TL 10 ms Enable between two transmissions TT 10 ms Data hold time TH 2 ms |
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