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DS1972 Datasheet(PDF) 4 Page - Maxim Integrated Products

Part # DS1972
Description  1024-Bit EEPROM iButton
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS1972 Datasheet(HTML) 4 Page - Maxim Integrated Products

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DS1972: 1024-Bit EEPROM iButton
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DESCRIPTION
The DS1972 combines 1024 bits of EEPROM, an 8-byte register/control page with up to 7 user read/write bytes,
and a fully-featured 1-Wire interface in a rugged iButton package. Each DS1972 has its own 64-bit ROM
registration number that is factory lasered to provide a guaranteed unique identity for absolute traceability. Data is
transferred serially via the 1-Wire protocol, which requires only a single data contact and a ground return. The
DS1972 has an additional memory area called the scratchpad that acts as a buffer when writing to the main
memory or the register page. Data is first written to the scratchpad from which it can be read back. After the data
has been verified, a Copy Scratchpad command transfers the data to its final memory location. Applications of the
DS1972 include access control/parking meter, Work-In-Progress tracking, tool management, inventory control, and
maintenance/inspection data storage. Software for communication with the DS1972 is available for free download
from the http://www.maxim-ic.com/products/ibutton/ website.
OVERVIEW
The block diagram in Figure 1 shows the relationships between the major control and memory sections of the
DS1972. The DS1972 has four main data components: 1) 64-bit lasered ROM, 2) 64-bit scratchpad, 3) four 32-byte
pages of EEPROM, and 4) 64-bit register page. The hierarchical structure of the 1-Wire protocol is shown in Figure
2. The bus master must first provide one of the seven ROM Function Commands, 1) Read ROM, 2) Match ROM, 3)
Search ROM, 4) Skip ROM, 5) Resume, 6) Overdrive-Skip ROM or 7) Overdrive-Match ROM. Upon completion of
an Overdrive ROM command byte executed at standard speed, the device enters Overdrive mode where all
subsequent communication occurs at a higher speed. The protocol required for these ROM function commands is
described in Figure 9. After a ROM function command is successfully executed, the memory functions become
accessible and the master may provide any one of the four memory function commands. The protocol for these
memory function commands is described in Figure 7. All data is read and written least significant bit first.
Figure 1. Block Diagram
PARASITE POWER
I/O
64-bit
Lasered ROM
1-Wire
Function Control
64-bit
Scratchpad
Data Memory
4 Pages of
256 bits each
CRC16
Generator
Memory
Function
Control Unit
Register Page
64 bits
DS1972


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