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P83C550EBPN Datasheet(PDF) 11 Page - NXP Semiconductors |
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P83C550EBPN Datasheet(HTML) 11 Page - NXP Semiconductors |
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11 / 28 page  Philips Semiconductors Product specification 80C550/83C550/87C550 80C51 8-bit microcontroller family 4K/128 OTP/ROM/ROMless, 8 channel 8 bit A/D, watchdog timer 1998 May 01 11 A very specific sequence of events must take place to feed the watchdog timer; it cannot be fed accidentally by a runaway program. The following routines demonstrate setting up and feeding the watchdog timer. These routines apply to all versions of the 8XC550 except the ROM part when running from internal program memory. This routine sets up and starts the watchdog timer. This is not necessary for internal ROM operation, because setup of the watchdog timer on masked ROM parts is accomplished directly via ROM mask options. SetWD: MOV WDL,#0FFh ;Set watchdog reload value. MOV WDCON,#0E5;Set up timer prescaler, mode, and ;run bits. ACALL FeedWD ;Start watchdog with a feed ;operation. RET This routine executes a watchdog timer feed operation, causing the timer to reload from WDL. Interrupts must be disabled during this operation due to the fact that the two feed registers must be loaded on consecutive instruction cycles, or a system reset will occur immediately. FeedWD: CLR EA ;This sequence must not be ;interrupted. MOV WFEED1,#0A5h;First instruction of feed sequence. MOV WFEED2,#05Ah;Second instruction of feed ;sequence. SETB EA ;Turn interrupts back on. RET An interrupt is available to allow the watchdog timer to be used as a general purpose timer in applications where the watchdog function is not needed. The timer operates in the same manner when used as a general purpose timer except that the timer interrupt is generated on timer underflow instead of a chip reset. Refer to the 87C550 data sheet for additional information on watchdog timer operation. Programming the Watchdog Timer Both the EPROM and ROM devices have a set of SFRs for holding the watchdog autoload values and the control bits. The watchdog time-out flag is present in the watchdog control register and operates the same in all versions. In the EPROM device, the watchdog parameters (autoload value and control) are always taken from the SFRs. In the ROM device, the watchdog parameters can be mask programmed or taken from the SFRs. The selection to take the watchdog parameters from the SFRs or from the mask programmed values is controlled by EA (external access). When EA is high (internal ROM access), the watchdog parameters are taken from the mask programmed values. If the watchdog is masked programmed to the timer mode, then the autoload values and the pre-scaler taps are taken from the SFRs. When EA is low (external access), the watchdog parameters are taken from the SFRs. The user should be able to leave code in his program which initializes the watchdog SFRs even though he has migrated to the mask ROM part. This allows no code changes from EPROM prototyping to ROM coded production parts. Watchdog Detailed Operation EPROM Device (and ROMless Operation: EA = 0) In the ROMless operation (ROM part, EA = 0) and in the EPROM device, the watchdog operates in the following manner. Whether the watchdog is in the watchdog or timer mode, when external RESET is applied, the following takes place: – Watchdog mode bit set to timer mode. – Watchdog run control bit set to OFF. – Autoload register set to FF (max count). – Watchdog time-out flag cleared. – Prescaler is cleared. – Prescaler tap set to the highest divide. – Autoload takes place. The watchdog can be fed even though it is in the timer mode. Note that the operational concept is for the watchdog mode of operation, when coming out of a hardware reset, the software should load the autoload registers, set the mode to watchdog, and then feed the watchdog (cause an autoload). The watchdog will now be starting at a known point. If the watchdog is in the watchdog mode and running and happens to underflow at the time the external RESET is applied, the watchdog time-out flag will be cleared. When the watchdog is in the watchdog mode and the watchdog underflows, the following action takes place: – Autoload takes place. – Watchdog time-out flag is set – Timer mode interrupt flag unchanged. – Mode bit unchanged. – Watchdog run bit unchanged. – Autoload register unchanged. – Prescaler tap unchanged. – All other device action same as external reset. Note that if the watchdog underflows, the program counter will start from 00H as in the case of an external reset. The watchdog time-out flag can be examined to determine if the watchdog has caused the reset condition. The watchdog time-out flag bit can be cleared by software. When the watchdog is in the timer mode and the timer software underflows, the following action takes place: – Autoload takes place. – Watchdog time-out flag is set – Mode bit unchanged. – Watchdog run bit unchanged. – Autoload register unchanged. – Prescaler tap unchanged. The timer mode interrupt flag is cleared when the interrupt routine is invoked. This bit can also be cleared directly by software without a software feed operation. Mask ROM Device (EA = 1) In the mask ROM device, the watchdog mode bit (WDMOD) is mask programmed and the bit in the watchdog command register is read only and reflects the mask programmed selection. If the mask programmed mode bit selects the timer mode, then the watchdog run bit (WDRUN) operates as described under EPROM Device. If the mask programmed bit selects the watchdog mode, then the watchdog run bit has no effect on the timer operation. |
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