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ADC0831 Datasheet(PDF) 18 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part No. ADC0831
Description  8-Bit Serial I/O A/D Converters with Multiplexer Options
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
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 18 page
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Functional Description (Continued)
resistance of the analog signal source. Bypass capacitors
should not be used if the source resistance is greater than 1
k
Ω.
This source resistance limitation is important with regard to
the DC leakage currents of input multiplexer as well. The
worst-case leakage current of ±1 µA over temperature will
createa1mV input error witha1k
Ω source resistance. An
op amp RC active low pass filter can provide both imped-
ance buffering and noise filtering should a high impedance
signal source be required.
5.0 Optional Adjustments
5.1 Zero Error
The zero of the A/D does not require adjustment. If the
minimum analog input voltage value, V
IN(MIN), is not ground
a zero offset can be done. The converter can be made to
output 0000 0000 digital code for this minimum input voltage
by biasing any V
IN (−) input at this VIN(MIN) value. This
utilizes the differential mode operation of the A/D.
The zero error of the A/D converter relates to the location of
the first riser of the transfer function and can be measured by
grounding the V
IN(−) input and applying a small magnitude
positive voltage to the V
IN(+) input. Zero error is the differ-
ence between the actual DC input voltage which is neces-
sary to just cause an output digital code transition from 0000
0000 to 0000 0001 and the ideal 12 LSB value (12 LSB=9.8
mV for V
REF=5.000 VDC).
5.2 Full-Scale
The full-scale adjustment can be made by applying a differ-
ential input voltage which is 1 12 LSB down from the desired
analog full-scale voltage range and then adjusting the mag-
nitude of the V
REF input (or VCC for the ADC0832) for a
digital output code which is just changing from 1111 1110 to
1111 1111.
5.3 Adjusting for an Arbitrary Analog Input Voltage
Range
If the analog zero voltage of the A/D is shifted away from
ground (for example, to accommodate an analog input signal
which does not go to ground), this new zero reference
should be properly adjusted first. A V
IN (+) voltage which
equals this desired zero reference plus 12 LSB (where the
LSB is calculated for the desired analog span, using 1 LSB=
analog span/256) is applied to selected “+” input and the
zero reference voltage at the corresponding “−” input should
then be adjusted to just obtain the 00
HEX to 01HEX code
transition.
The full-scale adjustment should be made [with the proper
V
IN(−) voltage applied] by forcing a voltage to the VIN(+)
input which is given by:
where:
V
MAX = the high end of the analog input range
and
V
MIN =
the low end (the offset zero) of the analog
range.
(Both are ground referenced.)
The V
REF (or VCC) voltage is then adjusted to provide a code
change from FE
HEX to FFHEX. This completes the adjust-
ment procedure.
6.0 Power Supply
A unique feature of the ADC0838 and ADC0834 is the inclu-
sion of a zener diode connected from the V
+ terminal to
ground which also connects to the V
CC terminal (which is the
actual converter supply) through a silicon diode, as shown in
Figure 3. (Note 3)
This zener is intended for use as a shunt voltage regulator to
eliminate the need for any additional regulating components.
This is most desirable if the converter is to be remotely
located from the system power source.Figure 4 and Figure 5
illustrate two useful applications of this on-board zener when
an external transistor can be afforded.
An important use of the interconnecting diode between V
+
and V
CC is shown in Figure 6 and Figure 7. Here, this diode
is used as a rectifier to allow the V
CC supply for the converter
to be derived from the clock. The low current requirements of
the A/D and the relatively high clock frequencies used (typi-
cally in the range of 10k–400 kHz) allows using the small
value filter capacitor shown to keep the ripple on the V
CC line
to well under 14 of an LSB. The shunt zener regulator can
also be used in this mode. This requires a clock voltage
swing which is in excess of V
Z. A current limit for the zener is
needed, either built into the clock generator or a resistor can
be used from the CLK pin to the V
+ pin.
00558311
FIGURE 3. An On-Chip Shunt Regulator Diode
www.national.com
18




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