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M5M4V4405CTP-6 Datasheet(PDF) 1 Page - Mitsubishi Electric Semiconductor |
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M5M4V4405CTP-6 Datasheet(HTML) 1 Page - Mitsubishi Electric Semiconductor |
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1 / 27 page  EDO (HYPER PAGE MODE) 4194304-BIT(1048576-WORD BY 4-BIT) DYNAMIC RAM M5M4V4405CJ,TP-6,-7,-6S,-7S MITSUBISHI LSIs PIN CONFIGURATION (TOP VIEW) time (min.ns) Cycle dissipa- (typ.mW) Power tion DQ1 Outline 26P3Z-E (300mil TSOP) DQ2 A0 A1 A2 W RAS A3 VCC A9 1 2 3 4 5 13 12 11 10 9 VSS DQ4 DQ3 CAS OE A4 A7 A6 A5 16 15 26 25 24 23 17 18 22 14 A8 Standard 26 pin SOJ, 26 pin TSOP(II) Single 3.3V±0.3V supply Low stand-by power dissipation CMOS lnput level .................................................1.8mW(Max)* CMOS lnput level ................................................180µW(Max) Low operating power dissipation M5M4V4405Cxx-6, -6S .....................................288.0mW (Max) M5M4V4405Cxx-7, -7S ....................................252.0mW (Max) Self refresh capabiility* Self refresh current ..............................................100µA(max) Extended refresh capability* Extended refresh current ....................................100µA(max) Hyper-page mode (1024-bit random access), Read-modify- write, RAS-only refresh CAS before RAS refresh, Hidden refresh, CBR self refresh(-6S,-7S) capabilities. Early-write mode and OE and W to control output buffer impedance 1024 refresh cycles every 16.4ms (A0~A9) 1024refresh cycle every128ms (A0~A9)* *: Applicable to self refresh version (M5M4V4405Cxx-6S,-7S: option) only This is a family of 1048576-word by 4-bit dynamic RAMS, fabricated with the high performance CMOS process,and is ideal for large-capacity memory systems where high speed, low power dissipation , and low costs are essential. The use of quadruple-layer polysilicon process combined with silicide technology and a single-transistor dynamic storage stacked capacitor cell provide high circuit density at reduced costs. Multiplexed address inputs permit both a reduction in pins and an increase in system densities. Self or extended refresh current is low enough for battery back-up application. 1 DESCRIPTION FEATURES Type name RAS CAS Address M5M4V4405CXX-7, -7S 70 20 35 130 231 20 OE M5M4V4405CXX-6, -6S 60 15 30 110 264 15 PIN DESCRIPTION Pin name A0~A9 DQ1~DQ4 RAS W VCC VSS CAS Function OE EDO (HYPER PAGE MODE) 4194304-BIT (1048576-WORD BY 4-BIT) DYNAMIC RAM M5M4V4405CJ,TP-6,-7,-6S,-7S MITSUBISHI LSIs DQ1 Outline 26P0J (300mil SOJ) DQ2 A0 A1 A2 W RAS A3 VCC A9 1 2 3 4 5 13 12 11 10 9 VSS DQ4 DQ3 CAS OE A4 A7 A6 A5 16 15 26 25 24 23 17 18 22 14 A8 XX=J, TP APPLICATION Lap top personal computer,Solid state disc, Microcomputer memory, Refresh memory for CRT access time (max.ns) access time (max.ns) access time (max.ns) access time (max.ns) Address inputs Data inputs / outputs Row address strobe input Column address strobe input Write control input Power supply (+3.3V) Ground (0V) Output enable input |
Similar Part No. - M5M4V4405CTP-6 |
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Similar Description - M5M4V4405CTP-6 |
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