5

IDT72V10071/72V11071/72V12071/72V13071/72V14071 3.3V, MULTIMEDIA FIFO

DUAL 256 x 8, 512 x 8, 1024 x 8, 2048 x 8 and 4096 x 8

INDUSTRIALTEMPERATURERANGE

In Pulse Levels

GND to 3.0V

Input Rise/Fall Times

3ns

Input Timing Reference Levels

1.5V

Output Reference Levels

1.5V

OutputLoad

See Figure 1

Industrial

IDT72V10071L15

IDT72V11071L15

IDT72V12071L15

IDT72V13071L15

IDT72V14071L15

Symbol

Parameter

Min.

Max.

Unit

Clock Cycle Frequency

—

66.7

MHz

Data Access Time

2

10

ns

Clock Cycle Time

15

—

ns

Clock High Time

6

—

ns

Clock Low Time

6

—

ns

Data Set-up Time

4

—

ns

Data Hold Time

1

—

ns

Enable Set-up Time

4

—

ns

Enable Hold Time

1

—

ns

15

—

ns

Reset Set-up Time

10

—

ns

Reset Recovery Time

10

—

ns

Reset to Flag Time and Output Time

—

15

ns

0—

ns

Output Enable to Output Valid

3

8

ns

38

ns

Write Clock to Full Flag

—

10

ns

Read Clock to Empty Flag

—

10

ns

Skew Time Between Read Clock and Write Clock for Empty Flag and Full Flag

6

—

ns

*Includes jig and scope capacitances.

Figure 1. Output Load

or equivalent circuit

NOTES:

1. Pulse widths less than minimum values are not allowed.

2. Values guaranteed by design, not currently tested.

30pF*

330

Ω

3.3V

510

Ω

D.U.T.

6360 drw03

°C to +85°C)

AC TEST CONDITIONS