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M36W0R5020B0ZAQF Datasheet(PDF) 7 Page - STMicroelectronics |
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M36W0R5020B0ZAQF Datasheet(HTML) 7 Page - STMicroelectronics |
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7 / 26 page  7/26 M36W0R5020T0, M36W0R5020B0 SRAM Lower Byte Enable (LBS). The Lower Byte Enable input enables the lower byte for SRAM (DQ0-DQ7). LBS is active low. VDDF Supply Voltage. VDDF provides the power supply to the internal core of the Flash memory component. It is the main power supply for all Flash memory operations (Read, Program and Erase). VDDS Supply Voltage. VDDS provides the power supply to the internal core of the SRAM device. It is the main power supply for all SRAM operations. VDDQ Supply Voltage. VDDQ provides the power supply for the Flash memory and SRAM I/O pins. This allows all Outputs to be powered indepen- dently of the Flash memory and SRAM core power supplies: VDDF and VDDS, respectively. VPPF Program Supply Voltage. VPPF is a Flash memory power supply pin. The Supply Voltage VDDF and the Program Supply Voltage VPP can be applied in any order. The pin can also be used as a control input for the Flash memory. The two functions are selected by the voltage range applied to the pin. If VPPF is kept in a low voltage range (0V to VDDQ) VPPF is seen as a con- trol input. In this case a voltage lower than VPPLK gives an absolute protection against program or erase, while VPPF > VPP1 enables these functions (see Tables 6 and 7, DC Characteristics for the rel- evant values). VPPF is only sampled at the begin- ning of a program or erase; a change in its value after the operation has started does not have any effect and program or erase operations continue. If VPPF is in the range of VPPH it acts as a power supply pin. In this condition VPPF must be stable until the Program/Erase algorithm is completed. VSS Ground. VSS is the common ground refer- ence for all voltage measurements in the Flash memory (core and I/O Buffers) and SRAM compo- nents. Note: Each Flash memory device in a system should have its supply voltage (VDDF) and the program supply voltage VPPF decoupled with a 0.1µF ceramic capacitor close to the pin (high frequency, inherently low inductance capaci- tors should be as close as possible to the package). See Figure 7., AC Measurement Load Circuit. The PCB track widths should be sufficient to carry the required VPPF program and erase currents. |
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