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ADSP-2186NKST-320 Datasheet(PDF) 6 Page - Analog Devices |
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ADSP-2186NKST-320 Datasheet(HTML) 6 Page - Analog Devices |
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6 / 45 page  ADSP-218xN Series –6– REV. 0 Memory Interface Pins ADSP-218xN series members can be used in one of two modes: Full Memory Mode, which allows BDMA operation with full external overlay memory and I/O capability, or Host Mode, which allows IDMA operation with limited external addressing capabilities. The operating mode is determined by the state of the Mode C pin during RESET and cannot be changed while the processor is running. Table 3 and Table 4 list the active signals at specific pins of the DSP during either of the two operating modes (Full Memory or Host). A signal in one table shares a pin with a signal from the other table, with the active signal determined by the mode that is set. For the shared pins and their alternate signals (e.g., A4/IAD3), refer to the package pinouts in Table 27 on page 40 and Table 28 on page 42. Terminating Unused Pins Table 5 shows the recommendations for terminating unused pins. Table 3. Full Memory Mode Pins (Mode C = 0) Pin Name # of Pins I/O Function A13 – 0 14 O Address Output Pins for Program, Data, Byte, and I/O Spaces D23 – 0 24 I/O Data I/O Pins for Program, Data, Byte, and I/O Spaces (8 MSBs are also used as Byte Memory Addresses.) Table 4. Host Mode Pins (Mode C = 1) Pin Name # of Pins I/O Function IAD15 – 0 16 I/O IDMA Port Address/Data Bus A0 1 O Address Pin for External I/O, Program, Data, or Byte Access 1 D23 – 8 16 I/O Data I/O Pins for Program, Data, Byte, and I/O Spaces IWR 1 I IDMA Write Enable IRD 1 I IDMA Read Enable IAL 1 I IDMA Address Latch Pin IS 1I IDMA Select IACK 1 O IDMA Port Acknowledge Configurable in Mode D; Open Drain 1In Host Mode, external peripheral addresses can be decoded using the A0, CMS, PMS, DMS, and IOMS signals. Table 5. Unused Pin Terminations Pin Name1 I/O 3-State (Z)2 Reset State Hi-Z3 Caused By Unused Configuration XTAL O O Float CLKOUT O O Float 4 A13 – 1 or O (Z) Hi-Z BR, EBR Float IAD12 – 0 I/O (Z) Hi-Z IS Float A0 O (Z) Hi-Z BR, EBR Float D23 – 8 I/O (Z) Hi-Z BR, EBR Float D7 or I/O (Z) Hi-Z BR, EBR Float IWR I I High (Inactive) D6 or I/O (Z) Hi-Z BR, EBR Float IRD II BR, EBR High (Inactive) D5 or I/O (Z) Hi-Z Float IAL I I Low (Inactive) D4 or I/O (Z) Hi-Z BR, EBR Float IS I I High (Inactive) |
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