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GC4114 Datasheet(PDF) 6 Page - Texas Instruments |
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GC4114 Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 45 page  Texas Instruments Inc. - 2 - MAY 22, 2000 GC4114 QUAD TRANSMIT CHIP DATA SHEET REV 1.0 This document contains information which may be changed at any time without notice 3.0 FUNCTIONAL DESCRIPTION The GC4114 quad transmit chip contains four identical up-conversion circuits. Each up-convert circuit accepts a real or complex signal, interpolates it by a programmable factor ranging from 32 to 65,536 (16 to 32,768 for single-sideband modulation), up-converts the signal to a selected center frequency, sums it with other up-converted samples and outputs the combined signal. The chip contains a user programmable input filter which can be used to shape the transmitted data, or can be used as a Nyquist transmit filter for digital data transmission. See the application notes in Section 7.5 for details on using the chip to transmit QPSK or QAM data. The up-converters are designed to maintain over 90 dB of spur free dynamic range and image rejection. Each up-convert circuit accepts 16 bit inputs (bit serial) and produces 16 bit outputs. The up-converter outputs are summed with an external 16 bit input to produce a single 16 bit output. The frequencies and phase offsets of the four sine/cosine sequence generators can be independently specified, as can the gain of each circuit. The up-converters share the same bandwidth, filter coefficients and input formats. On chip diagnostic circuits are provided to simplify system debug and maintenance. The chip receives configuration and control information over a microprocessor compatible bus consisting of an 8 bit data I/O port, a 6 bit address port, a chip enable strobe, a read strobe and a write strobe. The chip’s 64 control registers (8 bits each) are memory mapped into the 6 bit address space of the control port. 3.1 CONTROL INTERFACE The chip is configured by writing control information into sixty four control registers within the chip. The contents of these control registers and how to use them are described in Section 5. The registers are written to or read from using the C[0:7], A[0:5], CE, RD and WR pins. Each control register has been assigned a unique address within the chip. This interface is designed to allow the GC4114 to appear to an external processor as a memory mapped peripheral (the pin RD is equivalent to a memory chip’s OE pin). An external processor (a microprocessor, computer, or DSP chip) can write into a register by setting A[0:5] to the desired register address, selecting the chip using the CE pin, setting C[0:7] to the desired value and then pulsing WR low. The data will be latched on the rising edge of WR or CE. To read from a control register the processor must set A[0:5] to the desired address, select the chip with the CE pin, and then set RD low. The chip will then drive C[0:7] with the contents of the selected register. After the processor has read the value from C[0:7] it should set RD and CE high. The C[0:7] pins are turned off (high impedance) whenever CE or RD are high or when WR is low. The chip will only drive these pins when both CE and RD are low and WR is high. One can also ground the RD pin and use the WR pin as a read/write direction control and use the CE pin as a control I/O strobe. |
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