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74HCT4510D Datasheet(PDF) 7 Page - NXP Semiconductors |
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74HCT4510D Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 12 page December 1990 7 Philips Semiconductors Product specification BCD up/down counter 74HC/HCT4510 trem removal time MR to CP 80 16 14 28 10 8 100 20 17 120 24 20 ns 2.0 4.5 6.0 Fig.10 trem removal time PL to CP 80 16 14 14 5 4 100 20 17 120 24 20 ns 2.0 4.5 6.0 Fig.10 tsu set-up time UP/DN to CP 100 20 17 30 11 9 125 25 21 150 30 26 ns 2.0 4.5 6.0 Fig.8 tsu set-up time CE to CP 100 20 17 19 7 6 125 25 21 150 30 26 ns 2.0 4.5 6.0 Fig.8 tsu set-up time Dn to PL 100 20 17 17 6 5 125 25 21 150 30 26 ns 2.0 4.5 6.0 Fig.11 th hold time CE to CP 5 5 5 0 0 0 5 5 5 5 5 5 ns 2.0 4.5 6.0 Fig.8 th hold time Dn to PL 3 3 3 −6 −2 −2 3 3 3 3 3 3 ns 2.0 4.5 6.0 Fig.11 th hold time UP/DN to CP 0 0 0 −19 −7 −6 0 0 0 0 0 0 ns 2.0 4.5 6.0 Fig.8 fmax maximum clock pulse frequency 6.0 30 35 17 52 62 4.8 24 28 4.0 20 24 MHz 2.0 4.5 6.0 Fig.7 SYMBOL PARAMETER Tamb (°C) UNIT TEST CONDITIONS 74HC VCC (V) WAVEFORMS +25 −40 to +85 −40 to +125 min. typ. max. min. max. min. max. |
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