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LP38859T-0.8 Datasheet(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # LP38859T-0.8
Description  3A Fast-Response High-Accuracy LDO Linear Regulator with Soft-Start
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LP38859T-0.8 Datasheet(HTML) 4 Page - National Semiconductor (TI)

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Electrical Characteristics Unless otherwise specified: V
IN =VOUT(NOM) + 1V, VBIAS = 3.0V, IOUT =10mA,
CIN =COUT = 10 µF, CBIAS = 1 µF, CSS = open. Limits in standard type are for TJ = 25˚C only; limits in boldface type apply
over the junction temperature (T
J) range of -40˚C to +125˚C. Minimum and Maximum limits are guaranteed through test,
design, or statistical correlation. Typical values represent the most likely parametric norm at T
J = 25˚C, and are provided for
reference purposes only. (Continued)
Symbol
Parameter
Conditions
MIN
TYP
MAX
Units
AC Parameters
PSRR
(V
IN)
Ripple Rejection for V
IN Input
Voltage
V
IN =VOUT(NOM) + 1V,
f = 120 Hz
-80-
dB
V
IN =VOUT(NOM) + 1V,
f=1kHz
-65-
PSRR
(V
BIAS)
Ripple Rejection for V
BIAS
Voltage
V
BIAS =VOUT(NOM) + 3V,
f = 120 Hz
-58-
V
BIAS =VOUT(NOM) + 3V,
f=1kHz
-58-
e
n
Output Noise Density
f = 120 Hz
-
1
-
µV/
Hz
Output Noise Voltage
V
OUT = 1.8V
BW = 10 Hz − 100 kHz
-
150
-
µV (rms)
BW = 300 Hz − 300 kHz
-
90
-
Thermal Parameters
T
SD
Thermal Shutdown Junction
Temperature
-
160
-
˚C
T
SD(HYS)
Thermal Shutdown Hysteresis
-
10
-
θ
J-A
Thermal Resistance, Junction to
Ambient(Note 3)
TO220-5
-
60
-
˚C/W
TO263-5
-
60
-
θ
J-C
Thermal Resistance, Junction to
Case(Note 3)
TO220-5
-
3
-
TO263-5
-
3
-
Note 1: Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the
device is intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and conditions, see the Electrical
Characteristics.
Note 2: The human body model is a 100 pF capacitor discharged through a 1.5k resistor into each pin. Test method is per JESD22-A114. The HBM rating for device
pin 1 (SS) is ±1.5 kV.
Note 3: Device power dissipation must be de-rated based on device power dissipation (PD), ambient temperature (TA), and package junction to ambient thermal
resistance (
θJA). Additional heat-sinking may be required to ensure that the device junction temperature (TJ) does not exceed the maximum operating rating. See
the Application Information section for details.
Note 4: Output voltage line regulation is defined as the change in output voltage from nominal value resulting from a change in input voltage.
Note 5: Output voltage load regulation is defined as the change in output voltage from nominal value as the load current increases from no load to full load.
Note 6: Dropout voltage is defined the as input to output voltage differential (VIN -VOUT) where the input voltage is low enough to cause the output voltage to drop
no more than 2% from the nominal value.
www.national.com
4


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