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MB89P485-104PFM Datasheet(PDF) 4 Page - Fujitsu Component Limited. |
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MB89P485-104PFM Datasheet(HTML) 4 Page - Fujitsu Component Limited. |
4 / 55 page MB89480/480L Series 4 (Continued) Note : 1 tinst = one instruction cycle (execution time) which can be selected as 1/4, 1/8, 1/16, or 1/64 of main clock. s PACKAGE AND CORRESPONDING PRODUCTS O : Availabe X : Not available Part number Parameter MB89485L MB89485 MB89P485L MB89P485 MB89PV480 A/D converter 10-bit resolution × 4 channels. A/D conversion function (conversion time: 60 tinst ). Supports repeated activation by internal clock. LCD controller/driver Common output : 4 (Max) Segment output : 31 (Max) (selected resistor ladder) : 26 (Max) (selected booster) Bias power supply pins : 4 LCD display RAM size : 31 × 4 bits Dividing resistor/booster : selected by mask option UART/SIO Synchronous/asynchronous data transfer capability. (Max baud rate: 97.656 Kbps at 12.5 MHz). (7 and 8 bits with parity bit; 8 and 9 bits without parity bit). Buzzer output 7 frequencies are selectable by software. Standby mode Sleep mode, stop mode, watch mode, sub-clock mode. Process CMOS Operating voltage 2.2 V to 3.6 V 2.2 V to 5.5 V 2.7 V to 3.6 V 3.5 V to 5.5 V 2.7 V to 5.5 V *1 : Use MBM27C256A as the external ROM. *2 : Read protection feature is selected by part number, detail please refer to MASK OPTIONS. Part number Package MB89485/485L MB89P485/P485L MB89PV480 DIP-64P-M01 O O X FPT-64P-M09 O O X MDP-64C-P02 X X O MQP-64C-P01 X X O |
Similar Part No. - MB89P485-104PFM |
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