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EM6682WW11 Datasheet(PDF) 5 Page - EM Microelectronic - MARIN SA |
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EM6682WW11 Datasheet(HTML) 5 Page - EM Microelectronic - MARIN SA |
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5 / 61 page  R EM6682 Copyright © 2005, EM Microelectronic-Marin SA 5 www.emmicroelectronic.com 2. Operating modes The EM6682 can operate in three different modes of which 2 are low-power dissipation modes (Stand-By and Sleep). The modes and transitions between them are shown in Figure 5. 1.) Active mode 2.) Stand-By mode 3.) Sleep mode Figure 5. EM6682 operating mode transitions It is possible to initiate Power-Check at every reset by metal option. In this case, in order to change from reset state to active state, the supply voltage must be higher than the active Power-Check selection level. This selection level corresponds to the SVLD level 5 (default) after power-up or to the SVLD level selection active at the end of the reset state. 2.1 ACTIVE Mode The active mode is the actual CPU running mode. Instructions are read from the internal ROM and executed by the CPU. Leaving the active mode: via the halt instruction to go into standby mode, writing the SLEEP bit to go into Sleep mode or detecting the reset to go into reset mode. 2.2 STANDBY (Halt) Mode Executing a HALT instruction puts the EM6682 into standby mode. The voltage regulator, oscillator, watchdog timer, interrupts, timers and counters are operating. However, the CPU stops since the clock related to instruction execution stops. Registers, RAM and I/O pins retain their states prior to STANDBY mode. STANDBY is cancelled by a RESET or an Interrupt request if enabled. 2.3 SLEEP Mode Writing to the Sleep bit in the RegSysCntl1 register puts the EM6682 in sleep mode. The oscillator stops and most functions of the EM6682 are inactive. To be able to write to the Sleep bit, the SleepEn bit in RegSysCntl2 must first be set to "1". In SLEEP mode only the voltage regulator is active to maintain the RAM data integrity, all other functions are in reset state. SLEEP mode may be cancelled by Wake/Up on change, external reset or by Sleep Reset Counter if any of them is enabled . Waking up from sleep mode may takes some time to guarantee stable oscillation. Coming back from sleep mode puts the EM6682 in reset state and as such reinitializes all registers to their reset value. Waking up from sleep mode clears the Sleep flag but not the SleepEn bit. Inspecting the SleepEn allows to determine if the EM6682 was powered up (SleepEn = "0") or woken from sleep mode (SleepEn = "1"). START-UP RESET ACTIVE or running mode STAND-BY or HALT mode Clocks active SLEEP POWER-ON Power-On-Reset & Power Check Level POR static level Power-Check Active RC oscilator running 8 oscillator periods reset synchronizer and Power-Check 8 CPU clock periods Reset-pad WDreset PORwPC PORwPC PORwPC PORwPC Everything stopped Registers and RAM keep their value HALT instruction interrupt/event Sleep bit set SleepResCnt WakeUp on Change resetPortA WDreset |
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