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V3020TP8B Datasheet(PDF) 2 Page - EM Microelectronic - MARIN SA |
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V3020TP8B Datasheet(HTML) 2 Page - EM Microelectronic - MARIN SA |
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2 / 17 page  R V3020 Copyright © 2005, EM Microelectronic-Marin SA 2 www.emmicroelectronic.com Absolute Maximum Ratings Parameter Symbol Conditions Maximum voltage at VDD VDDmax VSS + 7.0V Minimun voltage at VDD VDDmin VSS – 0.3V Maximum voltage at any signal pin Vmax VDD + 0.3V Minimum voltage at any signal pin Vmin VSS – 0.3V Maximum storage temperature TSTOmax +150°C Minimum storage temperature TSTOmin -65°C Electrostatic discharge maximum to MIL-STD-883C method 3015.7 with ref. to VSS VSmax 1000V Maximum soldering conditions TSmax 250°C x 10s Table 1 Stresses above these listed maximum ratings may cause permanent damages to the device. Exposure beyond specified operating conditions may affect device reliability or cause malfunction. Handling Procedures This device has built-in protection against high static voltages or electric fields; however, anti-static precautions must be taken as for any other CMOS component. Unless otherwise specified, proper operation can only occur when all terminal voltages are kept within the voltage range. Unused inputs must always be tied to a defined logic voltage level. Operating Conditions Parameter Symbol Min Typ Max Unit Operating temperature 1) TA -40 +125 °C Logic supply voltage VDD 1.2 5.0 5.5 V Supply voltage dv/dt (power-up & power-down) 6 V/µs Decoupling capacitor 100 nF Crystal Characteristics Frequency 2) f 32.768 kHz Load capacitance CL 7 8.2 12.5 pF Series resistance RS 35 50 k Ω Table 2 1) The maximum operating temperature is confirmed by sampling at initial device qualification. In production, all devices are tested at +85°C. On request, devices tested at +125°C can be supplied. 2) See Fig. 5 Electrical Characteristics (standard temperature range) VDD= 5.0V ±10%, VSS = 0V and TA=-40 to +85°C, unless otherwise specified Parameter Symbol Test Conditions Min Typ Max Unit Total static supply ISS All outputs open, all inputs at VDD VDD = 3.0V, address 0 = 0 TA = 0 to +°70°C 390 600 490 nA nA Total static supply ISS All outputs open, all inputs at VDD VDD = 5V, address 0 = 0 TA = 0 to +°70°C 460 800 600 nA nA Dynamic current ISS I/O to VSS through 1MΩ RD = VSS, WR = VDD, CS = 4 MHz address 0 = 0, read all 0 300 µA Input / Output Input logic low VIL 1.0 V Input logic high VIH 3.5 V Output logic low VOL IOL = 4 mA 0.4 V Output logic high VOH IOH = 4 mA 2.4 V Input leakage IIN 0.0 < VIN < 5.0V 0.1 1 µA Output tri-state leakage on I/O pin ITS CS high, and address 0, bit 0, low 0.1 1 µA Oscillator Starting voltage VSTA 1.2 V Input capacitance on XI CIN TA = +25°C 13 pF Output capacitance on XO COUT TA = +25°C 9 pF Start-up time TSTA 1 s Frequency stability ∆f/f 1.5 ≤ VDD ≤ 5.5V, TA = +25°C 0.3 0.5 ppm/V Frequency Measurement Mode Current source on I/O pin pulsed on/off @ 256 Hz IONF CS high, addr.0, bit 0, high VI/O = 1V 10 25 60 µA Table 3 |
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