WV3HG264M64EEU665D6MG datasheet(4/11 Pages) WEDC

Part #	WV3HG264M64EEU665D6MG

Description	1GB - 2x64Mx64 DDR2 SDRAM UNBUFFERED

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Manufacturer	WEDC [White Electronic Designs Corporation]

Direct Link	http://www.whiteedc.com

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4 / 11 page

WV3HG264M64EEU-D6

December 2005

Rev. 0

ADVANCED

4

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

White Electronic Designs

DC OPERATING CONDITIONS

All Voltages Referenced to VSS

Parameter

Symbol

Rating

Units

Notes

Min.

Type

Max.

Supply Voltage

VCC

1.7

1.8

1.9

V

1

I/O Supply Voltage

VCCQ

1.7

1.8

1.9

V

4

VCCL Supply Voltage

VCCL

1.7

1.8

1.9

V

4

I/O Reference Voltage

VREF

0.49*VCCQ

0.50*VCCQ

0.51*VCCQ

V2

I/O Termination Voltage

VTT

VREF-0.04

VREF

VREF+0.04

V

3

Notes:

1. VCC and VCCQ must track each other. VCCQ must be less than or equal to VCC.

2. VREF is expected to equal VCCQ/2 of the transmitting device and to track variations in the DC level of the same. Peak-to-peak noise on VREF may not exceed +/- percent of the DC

value. Peak-to-peak AC noise on VREF may not exceed +/-2 percent of VREF. This measurement is to be taken at the nearest VREF bypass capacitor.

3. VTT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set equal to VREF and must track variations in the DC level of VREF.

4. VCCQ tracks with VCC; VCCL track with VCC.

ABSOLUTE MAXIMUM RATINGS

SSTL_1.8V

Symbol

Parameter

Min

Max

Unit

VCC

Voltage on VCC pin relative to VSS

- 1.0

2.3

V

VCCQ

Voltage on VCCQ pin relative to VSS

- 0.5

2.3

V

VCCL

Voltage on VCCL pin relative to VSS

- 0.5

2.3

V

VIN, VOUT

Voltage on any pin relative to VSS

- 0.5

2.3

V

TSTG

Storage Temperature

-55

100

°C

TCASE

Device operating Temperature

0

85

°C

IL

Input leakage current; Any input 0V<VIN<VCC;

VREF input 0V<VIN<<0.95; Other pins not

under test = 0V

Command/Address, RAS#,

CAS#, WE#

-80

80

uA

CS#, CKE

-40

40

uA

CK, CK#

-30

30

uA

DM

-10

10

uA

IOZ

Output leakage current; 0V<VOUT<VCCQ; DQs

and ODT are disable

DQ, DQS, DQS#

-10

10

uA

IVREF

VREF leakage current; VREF = Valid VREF level

-32

32

uA

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